sourcemod-central: sourcepawn/jit/x86/jit_x86.cpp@40cc5e9f0f1b (annotated)

dvander@367	1	/**
ds@653	2	* vim: set ts=4 :
dvander@371	3	* ================================================================
dvander@371	4	* SourcePawn (C)2004-2007 AlliedModders LLC. All rights reserved.
dvander@371	5	* ================================================================
dvander@367	6	*
dvander@367	7	* This file is not open source and may not be copied without explicit
dvander@367	8	* written permission of AlliedModders LLC. This file may not be redistributed
dvander@367	9	* in whole or significant part.
dvander@367	10	* For information, see LICENSE.txt or http://www.sourcemod.net/license.php
dvander@367	11	*
dvander@367	12	* Version: $Id$
dvander@367	13	*/
dvander@367	14
dvander@157	15	#include <string.h>
dvander@157	16	#include <stdlib.h>
dvander@157	17	#include <assert.h>
dvander@157	18	#include "jit_x86.h"
dvander@157	19	#include "opcode_helpers.h"
dvander@706	20	#include <x86_macros.h>
dvander@386	21	#include "jit_version.h"
dvander@157	22
dvander@157	23	#if defined USE_UNGEN_OPCODES
dvander@157	24	#include "ungen_opcodes.h"
dvander@157	25	#endif
dvander@157	26
dvander@157	27	inline void WriteOp_Move_Pri(JitWriter *jit)
dvander@157	28	{
dvander@157	29	//mov eax, edx
dvander@157	30	IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	31	}
dvander@157	32
dvander@157	33	inline void WriteOp_Move_Alt(JitWriter *jit)
dvander@157	34	{
dvander@157	35	//mov edx, eax
dvander@157	36	IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_PRI, MOD_REG);
dvander@157	37	}
dvander@157	38
dvander@157	39	inline void WriteOp_Xchg(JitWriter *jit)
dvander@157	40	{
dvander@157	41	//xchg eax, edx
dvander@157	42	IA32_Xchg_Eax_Reg(jit, AMX_REG_ALT);
dvander@157	43	}
dvander@157	44
dvander@157	45	inline void WriteOp_Push(JitWriter *jit)
dvander@157	46	{
dvander@157	47	//push stack, DAT offset based
dvander@157	48	//sub edi, 4
dvander@157	49	//mov ecx, [ebp+<val>]
dvander@157	50	//mov [edi], ecx
dvander@157	51	cell_t val = jit->read_cell();
dvander@157	52	IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	53	//optimize encoding a bit...
dvander@157	54	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	55	{
dvander@157	56	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val);
dvander@157	57	} else {
dvander@157	58	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val);
dvander@157	59	}
dvander@157	60	IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_TMP, MOD_MEM_REG);
dvander@157	61	}
dvander@157	62
dvander@157	63	inline void WriteOp_Push_C(JitWriter *jit)
dvander@157	64	{
dvander@157	65	//push stack
dvander@157	66	//mov [edi-4], <val>
dvander@157	67	//sub edi, 4
dvander@157	68	cell_t val = jit->read_cell();
dvander@157	69	IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_STK, val, -4);
dvander@157	70	IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	71	}
dvander@157	72
dvander@157	73	inline void WriteOp_Zero(JitWriter *jit)
dvander@157	74	{
dvander@157	75	//mov [ebp+<val>], 0
dvander@157	76	cell_t val = jit->read_cell();
dvander@157	77	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	78	{
dvander@157	79	IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_DAT, 0, (jit_int8_t)val);
dvander@157	80	} else {
dvander@157	81	IA32_Mov_Rm_Imm32_Disp32(jit, AMX_REG_DAT, 0, val);
dvander@157	82	}
dvander@157	83	}
dvander@157	84
dvander@157	85	inline void WriteOp_Zero_S(JitWriter *jit)
dvander@157	86	{
dvander@157	87	//mov [ebx+<val>], 0
dvander@157	88	cell_t val = jit->read_cell();
dvander@157	89	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	90	{
dvander@157	91	IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_FRM, 0, (jit_int8_t)val);
dvander@157	92	} else {
dvander@157	93	IA32_Mov_Rm_Imm32_Disp32(jit, AMX_REG_FRM, 0, val);
dvander@157	94	}
dvander@157	95	}
dvander@157	96
dvander@157	97	inline void WriteOp_Push_S(JitWriter *jit)
dvander@157	98	{
dvander@157	99	//push stack, FRM offset based
dvander@157	100	//sub edi, 4
dvander@157	101	//mov ecx, [ebx+<val>]
dvander@157	102	//mov [edi], ecx
dvander@157	103	cell_t val = jit->read_cell();
dvander@157	104	IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	105	//optimize encoding a bit...
dvander@157	106	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	107	{
dvander@157	108	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val);
dvander@157	109	} else {
dvander@157	110	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val);
dvander@157	111	}
dvander@157	112	IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_TMP, MOD_MEM_REG);
dvander@157	113	}
dvander@157	114
dvander@157	115	inline void WriteOp_Push_Pri(JitWriter *jit)
dvander@157	116	{
dvander@157	117	//mov [edi-4], eax
dvander@157	118	//sub edi, 4
dvander@157	119	IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_PRI, -4);
dvander@157	120	IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	121	}
dvander@157	122
dvander@157	123	inline void WriteOp_Push_Alt(JitWriter *jit)
dvander@157	124	{
dvander@157	125	//mov [edi-4], edx
dvander@157	126	//sub edi, 4
dvander@157	127	IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_ALT, -4);
dvander@157	128	IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	129	}
dvander@157	130
dvander@157	131	inline void WriteOp_Push2_C(JitWriter *jit)
dvander@157	132	{
dvander@157	133	Macro_PushN_C(jit, 2);
dvander@157	134	}
dvander@157	135
dvander@157	136	inline void WriteOp_Push3_C(JitWriter *jit)
dvander@157	137	{
dvander@157	138	Macro_PushN_C(jit, 3);
dvander@157	139	}
dvander@157	140
dvander@157	141	inline void WriteOp_Push4_C(JitWriter *jit)
dvander@157	142	{
dvander@157	143	Macro_PushN_C(jit, 4);
dvander@157	144	}
dvander@157	145
dvander@157	146	inline void WriteOp_Push5_C(JitWriter *jit)
dvander@157	147	{
dvander@157	148	Macro_PushN_C(jit, 5);
dvander@157	149	}
dvander@157	150
dvander@157	151	inline void WriteOp_Push2_Adr(JitWriter *jit)
dvander@157	152	{
dvander@157	153	Macro_PushN_Addr(jit, 2);
dvander@157	154	}
dvander@157	155
dvander@157	156	inline void WriteOp_Push3_Adr(JitWriter *jit)
dvander@157	157	{
dvander@157	158	Macro_PushN_Addr(jit, 3);
dvander@157	159	}
dvander@157	160
dvander@157	161	inline void WriteOp_Push4_Adr(JitWriter *jit)
dvander@157	162	{
dvander@157	163	Macro_PushN_Addr(jit, 4);
dvander@157	164	}
dvander@157	165
dvander@157	166	inline void WriteOp_Push5_Adr(JitWriter *jit)
dvander@157	167	{
dvander@157	168	Macro_PushN_Addr(jit, 5);
dvander@157	169	}
dvander@157	170
dvander@157	171	inline void WriteOp_Push2_S(JitWriter *jit)
dvander@157	172	{
dvander@157	173	Macro_PushN_S(jit, 2);
dvander@157	174	}
dvander@157	175
dvander@157	176	inline void WriteOp_Push3_S(JitWriter *jit)
dvander@157	177	{
dvander@157	178	Macro_PushN_S(jit, 3);
dvander@157	179	}
dvander@157	180
dvander@157	181	inline void WriteOp_Push4_S(JitWriter *jit)
dvander@157	182	{
dvander@157	183	Macro_PushN_S(jit, 4);
dvander@157	184	}
dvander@157	185
dvander@157	186	inline void WriteOp_Push5_S(JitWriter *jit)
dvander@157	187	{
dvander@157	188	Macro_PushN_S(jit, 5);
dvander@157	189	}
dvander@157	190
dvander@157	191	inline void WriteOp_Push5(JitWriter *jit)
dvander@157	192	{
dvander@157	193	Macro_PushN(jit, 5);
dvander@157	194	}
dvander@157	195
dvander@157	196	inline void WriteOp_Push4(JitWriter *jit)
dvander@157	197	{
dvander@157	198	Macro_PushN(jit, 4);
dvander@157	199	}
dvander@157	200
dvander@157	201	inline void WriteOp_Push3(JitWriter *jit)
dvander@157	202	{
dvander@157	203	Macro_PushN(jit, 3);
dvander@157	204	}
dvander@157	205
dvander@157	206	inline void WriteOp_Push2(JitWriter *jit)
dvander@157	207	{
dvander@157	208	Macro_PushN(jit, 2);
dvander@157	209	}
dvander@157	210
dvander@157	211	inline void WriteOp_Zero_Pri(JitWriter *jit)
dvander@157	212	{
dvander@157	213	//xor eax, eax
dvander@157	214	IA32_Xor_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG);
dvander@157	215	}
dvander@157	216
dvander@157	217	inline void WriteOp_Zero_Alt(JitWriter *jit)
dvander@157	218	{
dvander@157	219	//xor edx, edx
dvander@157	220	IA32_Xor_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_ALT, MOD_REG);
dvander@157	221	}
dvander@157	222
dvander@157	223	inline void WriteOp_Add(JitWriter *jit)
dvander@157	224	{
dvander@157	225	//add eax, edx
dvander@157	226	IA32_Add_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	227	}
dvander@157	228
dvander@157	229	inline void WriteOp_Sub(JitWriter *jit)
dvander@157	230	{
dvander@157	231	//sub eax, edx
dvander@157	232	IA32_Sub_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	233	}
dvander@157	234
dvander@157	235	inline void WriteOp_Sub_Alt(JitWriter *jit)
dvander@157	236	{
dvander@157	237	//neg eax
dvander@157	238	//add eax, edx
dvander@157	239	IA32_Neg_Rm(jit, AMX_REG_PRI, MOD_REG);
dvander@157	240	IA32_Add_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	241	}
dvander@157	242
dvander@157	243	inline void WriteOp_Proc(JitWriter *jit)
dvander@157	244	{
faluco@853	245	CompData co = (CompData )jit->data;
faluco@853	246
faluco@853	247	/* Specialized code to align this taking in account the function magic number */
dvander@157	248	jitoffs_t cur_offs = jit->get_outputpos();
faluco@853	249	jitoffs_t offset = ((cur_offs & 0xFFFFFFF8) + 8) - cur_offs;
faluco@853	250	if (!((offset + cur_offs) & 8))
dvander@157	251	{
faluco@853	252	offset += 8;
faluco@853	253	}
faluco@853	254	if (offset)
faluco@853	255	{
faluco@853	256	for (jit_uint32_t i=0; i<offset; i++)
dvander@157	257	{
dvander@157	258	jit->write_ubyte(IA32_INT3);
dvander@157	259	}
dvander@175	260	}
dvander@175	261
dvander@175	262	/* Write the info struct about this function */
dvander@175	263	jit->write_uint32(JIT_FUNCMAGIC);
dvander@175	264	jit->write_uint32(co->func_idx);
dvander@175	265
dvander@175	266	/* Now we have to backpatch our reloction offset! */
dvander@175	267	{
dvander@157	268	jitoffs_t offs = jit->get_inputpos() - sizeof(cell_t);
dvander@157	269	jitcode_t rebase = ((CompData *)jit->data)->rebase;
dvander@157	270	(jitoffs_t )((unsigned char *)rebase + offs) = jit->get_outputpos();
dvander@157	271	}
dvander@175	272
dvander@175	273	/* Lastly, if we're writing, keep track of the function count */
dvander@175	274	if (jit->outbase)
dvander@175	275	{
dvander@175	276	co->func_idx++;
dvander@175	277	}
dvander@175	278
dvander@157	279	//push old frame on stack:
dvander@157	280	//mov ecx, [esi+frm]
dvander@157	281	//mov [edi-4], ecx
dvander@157	282	//sub edi, 8 ;extra un-used slot for non-existant CIP
dvander@157	283	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_INFO, MOD_MEM_REG);
dvander@157	284	IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4);
dvander@157	285	IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG);
dvander@157	286	//save frame:
dvander@157	287	//mov ecx, edi - get new frame
dvander@157	288	//mov ebx, edi - store frame back
dvander@157	289	//sub ecx, ebp - relocate local frame
dvander@157	290	//mov [esi+frm], ecx
dvander@157	291	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_REG);
dvander@157	292	IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_STK, MOD_REG);
dvander@157	293	IA32_Sub_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_DAT, MOD_REG);
dvander@157	294	IA32_Mov_Rm_Reg(jit, AMX_REG_INFO, AMX_REG_TMP, MOD_MEM_REG);
dvander@157	295	}
dvander@157	296
dvander@157	297	inline void WriteOp_Lidx_B(JitWriter *jit)
dvander@157	298	{
dvander@157	299	cell_t val = jit->read_cell();
dvander@157	300	//shl eax, <val>
dvander@157	301	//add eax, edx
dvander@157	302	//mov eax, [ebp+eax]
dvander@157	303	IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG);
dvander@157	304	IA32_Add_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	305	Write_Check_VerifyAddr(jit, AMX_REG_PRI);
dvander@157	306	IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
dvander@157	307	}
dvander@157	308
dvander@157	309	inline void WriteOp_Idxaddr_B(JitWriter *jit)
dvander@157	310	{
dvander@157	311	//shl eax, <val>
dvander@157	312	//add eax, edx
dvander@157	313	cell_t val = jit->read_cell();
dvander@157	314	IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG);
dvander@157	315	IA32_Add_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	316	}
dvander@157	317
dvander@157	318	inline void WriteOp_Shl(JitWriter *jit)
dvander@157	319	{
dvander@157	320	//mov ecx, edx
dvander@157	321	//shl eax, cl
dvander@157	322	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
dvander@157	323	IA32_Shl_Rm_CL(jit, AMX_REG_PRI, MOD_REG);
dvander@157	324	}
dvander@157	325
dvander@157	326	inline void WriteOp_Shr(JitWriter *jit)
dvander@157	327	{
dvander@157	328	//mov ecx, edx
dvander@157	329	//shr eax, cl
dvander@157	330	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
dvander@157	331	IA32_Shr_Rm_CL(jit, AMX_REG_PRI, MOD_REG);
dvander@157	332	}
dvander@157	333
dvander@157	334	inline void WriteOp_Sshr(JitWriter *jit)
dvander@157	335	{
dvander@157	336	//mov ecx, edx
dvander@157	337	//sar eax, cl
dvander@157	338	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
dvander@157	339	IA32_Sar_Rm_CL(jit, AMX_REG_PRI, MOD_REG);
dvander@157	340	}
dvander@157	341
dvander@157	342	inline void WriteOp_Shl_C_Pri(JitWriter *jit)
dvander@157	343	{
dvander@157	344	//shl eax, <val>
dvander@157	345	jit_uint8_t val = (jit_uint8_t)jit->read_cell();
dvander@157	346	if (val == 1)
dvander@157	347	{
dvander@157	348	IA32_Shl_Rm_1(jit, AMX_REG_PRI, MOD_REG);
dvander@157	349	} else {
dvander@157	350	IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, val, MOD_REG);
dvander@157	351	}
dvander@157	352	}
dvander@157	353
dvander@157	354	inline void WriteOp_Shl_C_Alt(JitWriter *jit)
dvander@157	355	{
dvander@157	356	//shl edx, <val>
dvander@157	357	jit_uint8_t val = (jit_uint8_t)jit->read_cell();
dvander@157	358	if (val == 1)
dvander@157	359	{
dvander@157	360	IA32_Shl_Rm_1(jit, AMX_REG_ALT, MOD_REG);
dvander@157	361	} else {
dvander@157	362	IA32_Shl_Rm_Imm8(jit, AMX_REG_ALT, val, MOD_REG);
dvander@157	363	}
dvander@157	364	}
dvander@157	365
dvander@157	366	inline void WriteOp_Shr_C_Pri(JitWriter *jit)
dvander@157	367	{
dvander@157	368	//shr eax, <val>
dvander@157	369	jit_uint8_t val = (jit_uint8_t)jit->read_cell();
dvander@157	370	if (val == 1)
dvander@157	371	{
dvander@157	372	IA32_Shr_Rm_1(jit, AMX_REG_PRI, MOD_REG);
dvander@157	373	} else {
dvander@157	374	IA32_Shr_Rm_Imm8(jit, AMX_REG_PRI, val, MOD_REG);
dvander@157	375	}
dvander@157	376	}
dvander@157	377
dvander@157	378	inline void WriteOp_Shr_C_Alt(JitWriter *jit)
dvander@157	379	{
dvander@157	380	//shr edx, <val>
dvander@157	381	jit_uint8_t val = (jit_uint8_t)jit->read_cell();
dvander@157	382	if (val == 1)
dvander@157	383	{
dvander@157	384	IA32_Shr_Rm_1(jit, AMX_REG_ALT, MOD_REG);
dvander@157	385	} else {
dvander@157	386	IA32_Shr_Rm_Imm8(jit, AMX_REG_ALT, val, MOD_REG);
dvander@157	387	}
dvander@157	388	}
dvander@157	389
dvander@157	390	inline void WriteOp_SMul(JitWriter *jit)
dvander@157	391	{
dvander@157	392	//mov ecx, edx
dvander@157	393	//imul edx
dvander@157	394	//mov edx, ecx
dvander@157	395	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
dvander@157	396	IA32_IMul_Rm(jit, AMX_REG_ALT, MOD_REG);
dvander@157	397	IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_TMP, MOD_REG);
dvander@157	398	}
dvander@157	399
dvander@157	400	inline void WriteOp_Not(JitWriter *jit)
dvander@157	401	{
dvander@157	402	//test eax, eax
dvander@157	403	//mov eax, 0
dvander@157	404	//sete al
dvander@157	405	IA32_Test_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG);
dvander@157	406	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
dvander@157	407	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_E);
dvander@157	408	}
dvander@157	409
dvander@157	410	inline void WriteOp_Neg(JitWriter *jit)
dvander@157	411	{
dvander@157	412	//neg eax
dvander@157	413	IA32_Neg_Rm(jit, AMX_REG_PRI, MOD_REG);
dvander@157	414	}
dvander@157	415
dvander@157	416	inline void WriteOp_Xor(JitWriter *jit)
dvander@157	417	{
dvander@157	418	//xor eax, edx
dvander@157	419	IA32_Xor_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	420	}
dvander@157	421
dvander@157	422	inline void WriteOp_Or(JitWriter *jit)
dvander@157	423	{
dvander@157	424	//or eax, edx
dvander@157	425	IA32_Or_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	426	}
dvander@157	427
dvander@157	428	inline void WriteOp_And(JitWriter *jit)
dvander@157	429	{
dvander@157	430	//and eax, edx
dvander@157	431	IA32_And_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	432	}
dvander@157	433
dvander@157	434	inline void WriteOp_Invert(JitWriter *jit)
dvander@157	435	{
dvander@157	436	//not eax
dvander@157	437	IA32_Not_Rm(jit, AMX_REG_PRI, MOD_REG);
dvander@157	438	}
dvander@157	439
dvander@157	440	inline void WriteOp_Add_C(JitWriter *jit)
dvander@157	441	{
dvander@157	442	//add eax, <val>
dvander@157	443	cell_t val = jit->read_cell();
dvander@157	444	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	445	IA32_Add_Rm_Imm8(jit, AMX_REG_PRI, (jit_int8_t)val, MOD_REG);
dvander@157	446	else
dvander@157	447	IA32_Add_Eax_Imm32(jit, val);
dvander@157	448	}
dvander@157	449
dvander@157	450	inline void WriteOp_SMul_C(JitWriter *jit)
dvander@157	451	{
dvander@157	452	//imul eax, <val>
dvander@157	453	cell_t val = jit->read_cell();
dvander@157	454	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	455	IA32_IMul_Reg_Imm8(jit, AMX_REG_PRI, MOD_REG, (jit_int8_t)val);
dvander@157	456	else
dvander@157	457	IA32_IMul_Reg_Imm32(jit, AMX_REG_PRI, MOD_REG, val);
dvander@157	458	}
dvander@157	459
dvander@157	460	inline void WriteOp_Sign_Pri(JitWriter *jit)
dvander@157	461	{
dvander@157	462	//shl eax, 24
dvander@157	463	//sar eax, 24
dvander@157	464	IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, 24, MOD_REG);
dvander@157	465	IA32_Sar_Rm_Imm8(jit, AMX_REG_PRI, 24, MOD_REG);
dvander@157	466	}
dvander@157	467
dvander@157	468	inline void WriteOp_Sign_Alt(JitWriter *jit)
dvander@157	469	{
dvander@157	470	//shl edx, 24
dvander@157	471	//sar edx, 24
dvander@157	472	IA32_Shl_Rm_Imm8(jit, AMX_REG_ALT, 24, MOD_REG);
dvander@157	473	IA32_Sar_Rm_Imm8(jit, AMX_REG_ALT, 24, MOD_REG);
dvander@157	474	}
dvander@157	475
dvander@157	476	inline void WriteOp_Eq(JitWriter *jit)
dvander@157	477	{
dvander@157	478	//cmp eax, edx ; PRI == ALT ?
dvander@157	479	//mov eax, 0
dvander@157	480	//sete al
dvander@157	481	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	482	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
dvander@157	483	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_E);
dvander@157	484	}
dvander@157	485
dvander@157	486	inline void WriteOp_Neq(JitWriter *jit)
dvander@157	487	{
dvander@157	488	//cmp eax, edx ; PRI != ALT ?
dvander@157	489	//mov eax, 0
dvander@157	490	//setne al
dvander@157	491	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	492	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
dvander@157	493	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_NE);
dvander@157	494	}
dvander@157	495
dvander@157	496	inline void WriteOp_Sless(JitWriter *jit)
dvander@157	497	{
dvander@157	498	//cmp eax, edx ; PRI < ALT ? (signed)
dvander@157	499	//mov eax, 0
dvander@157	500	//setl al
dvander@157	501	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	502	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
dvander@157	503	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_L);
dvander@157	504	}
dvander@157	505
dvander@157	506	inline void WriteOp_Sleq(JitWriter *jit)
dvander@157	507	{
dvander@157	508	//cmp eax, edx ; PRI <= ALT ? (signed)
dvander@157	509	//mov eax, 0
dvander@157	510	//setle al
dvander@157	511	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	512	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
dvander@157	513	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_LE);
dvander@157	514	}
dvander@157	515
dvander@157	516	inline void WriteOp_Sgrtr(JitWriter *jit)
dvander@157	517	{
dvander@157	518	//cmp eax, edx ; PRI > ALT ? (signed)
dvander@157	519	//mov eax, 0
dvander@157	520	//setg al
dvander@157	521	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	522	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
dvander@157	523	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_G);
dvander@157	524	}
dvander@157	525
dvander@157	526	inline void WriteOp_Sgeq(JitWriter *jit)
dvander@157	527	{
dvander@157	528	//cmp eax, edx ; PRI >= ALT ? (signed)
dvander@157	529	//mov eax, 0
dvander@157	530	//setge al
dvander@157	531	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	532	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
dvander@157	533	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_GE);
dvander@157	534	}
dvander@157	535
dvander@157	536	inline void WriteOp_Eq_C_Pri(JitWriter *jit)
dvander@157	537	{
dvander@157	538	//cmp eax, <val> ; PRI == value ?
dvander@157	539	//mov eax, 0
dvander@157	540	//sete al
dvander@157	541	cell_t val = jit->read_cell();
dvander@157	542	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	543	IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_PRI, (jit_int8_t)val);
dvander@157	544	else
dvander@157	545	IA32_Cmp_Eax_Imm32(jit, val);
dvander@157	546	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
dvander@157	547	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_E);
dvander@157	548	}
dvander@157	549
dvander@157	550	inline void WriteOp_Eq_C_Alt(JitWriter *jit)
dvander@157	551	{
dvander@157	552	//xor eax, eax
dvander@157	553	//cmp edx, <val> ; ALT == value ?
dvander@157	554	//sete al
dvander@157	555	cell_t val = jit->read_cell();
dvander@157	556	IA32_Xor_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG);
dvander@157	557	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	558	IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_ALT, (jit_int8_t)val);
dvander@157	559	else
dvander@157	560	IA32_Cmp_Rm_Imm32(jit, MOD_REG, AMX_REG_ALT, val);
dvander@157	561	IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_E);
dvander@157	562	}
dvander@157	563
dvander@157	564	inline void WriteOp_Inc_Pri(JitWriter *jit)
dvander@157	565	{
dvander@157	566	//add eax, 1
dvander@157	567	IA32_Add_Rm_Imm8(jit, AMX_REG_PRI, 1, MOD_REG);
dvander@157	568	}
dvander@157	569
dvander@157	570	inline void WriteOp_Inc_Alt(JitWriter *jit)
dvander@157	571	{
dvander@157	572	//add edx, 1
dvander@157	573	IA32_Add_Rm_Imm8(jit, AMX_REG_ALT, 1, MOD_REG);
dvander@157	574	}
dvander@157	575
dvander@157	576	inline void WriteOp_Inc(JitWriter *jit)
dvander@157	577	{
dvander@157	578	//add [ebp+<val>], 1
dvander@157	579	cell_t val = jit->read_cell();
dvander@157	580	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	581	IA32_Add_Rm_Imm8_Disp8(jit, AMX_REG_DAT, 1, (jit_int8_t)val);
dvander@157	582	else
dvander@157	583	IA32_Add_Rm_Imm8_Disp32(jit, AMX_REG_DAT, 1, val);
dvander@157	584	}
dvander@157	585
dvander@157	586	inline void WriteOp_Inc_S(JitWriter *jit)
dvander@157	587	{
dvander@157	588	//add [ebx+<val>], 1
dvander@157	589	cell_t val = jit->read_cell();
dvander@157	590	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	591	IA32_Add_Rm_Imm8_Disp8(jit, AMX_REG_FRM, 1, (jit_int8_t)val);
dvander@157	592	else
dvander@157	593	IA32_Add_Rm_Imm8_Disp32(jit, AMX_REG_FRM, 1, val);
dvander@157	594	}
dvander@157	595
dvander@157	596	inline void WriteOp_Inc_I(JitWriter *jit)
dvander@157	597	{
dvander@157	598	//add [ebp+eax], 1
dvander@157	599	IA32_Add_RmEBP_Imm8_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_PRI, NOSCALE, 1);
dvander@157	600	}
dvander@157	601
dvander@157	602	inline void WriteOp_Dec_Pri(JitWriter *jit)
dvander@157	603	{
dvander@157	604	//sub eax, 1
dvander@157	605	IA32_Sub_Rm_Imm8(jit, AMX_REG_PRI, 1, MOD_REG);
dvander@157	606	}
dvander@157	607
dvander@157	608	inline void WriteOp_Dec_Alt(JitWriter *jit)
dvander@157	609	{
dvander@157	610	//sub edx, 1
dvander@157	611	IA32_Sub_Rm_Imm8(jit, AMX_REG_ALT, 1, MOD_REG);
dvander@157	612	}
dvander@157	613
dvander@157	614	inline void WriteOp_Dec(JitWriter *jit)
dvander@157	615	{
dvander@157	616	//sub [ebp+<val>], 1
dvander@157	617	cell_t val = jit->read_cell();
dvander@157	618	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	619	{
dvander@157	620	IA32_Sub_Rm_Imm8_Disp8(jit, AMX_REG_DAT, 1, (jit_int8_t)val);
dvander@157	621	} else {
dvander@157	622	IA32_Sub_Rm_Imm8_Disp32(jit, AMX_REG_DAT, 1, val);
dvander@157	623	}
dvander@157	624	}
dvander@157	625
dvander@157	626	inline void WriteOp_Dec_S(JitWriter *jit)
dvander@157	627	{
dvander@157	628	//sub [ebx+<val>], 1
dvander@157	629	cell_t val = jit->read_cell();
dvander@157	630	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	631	{
dvander@157	632	IA32_Sub_Rm_Imm8_Disp8(jit, AMX_REG_FRM, 1, (jit_int8_t)val);
dvander@157	633	} else {
dvander@157	634	IA32_Sub_Rm_Imm8_Disp32(jit, AMX_REG_FRM, 1, val);
dvander@157	635	}
dvander@157	636	}
dvander@157	637
dvander@157	638	inline void WriteOp_Dec_I(JitWriter *jit)
dvander@157	639	{
dvander@157	640	//sub [ebp+eax], 1
dvander@157	641	IA32_Sub_RmEBP_Imm8_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_PRI, NOSCALE, 1);
dvander@157	642	}
dvander@157	643
dvander@157	644	inline void WriteOp_Load_Pri(JitWriter *jit)
dvander@157	645	{
dvander@157	646	//mov eax, [ebp+<val>]
dvander@157	647	cell_t val = jit->read_cell();
dvander@157	648	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	649	{
dvander@157	650	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_DAT, (jit_int8_t)val);
dvander@157	651	} else {
dvander@157	652	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_DAT, val);
dvander@157	653	}
dvander@157	654	}
dvander@157	655
dvander@157	656	inline void WriteOp_Load_Alt(JitWriter *jit)
dvander@157	657	{
dvander@157	658	//mov edx, [ebp+<val>]
dvander@157	659	cell_t val = jit->read_cell();
dvander@157	660	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	661	{
dvander@157	662	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_DAT, (jit_int8_t)val);
dvander@157	663	} else {
dvander@157	664	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_DAT, val);
dvander@157	665	}
dvander@157	666	}
dvander@157	667
dvander@157	668	inline void WriteOp_Load_S_Pri(JitWriter *jit)
dvander@157	669	{
dvander@157	670	//mov eax, [ebx+<val>]
dvander@157	671	cell_t val = jit->read_cell();
dvander@157	672	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	673	{
dvander@157	674	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_FRM, (jit_int8_t)val);
dvander@157	675	} else {
dvander@157	676	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_FRM, val);
dvander@157	677	}
dvander@157	678	}
dvander@157	679
dvander@157	680	inline void WriteOp_Load_S_Alt(JitWriter *jit)
dvander@157	681	{
dvander@157	682	//mov edx, [ebx+<val>]
dvander@157	683	cell_t val = jit->read_cell();
dvander@157	684	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	685	{
dvander@157	686	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_FRM, (jit_int8_t)val);
dvander@157	687	} else {
dvander@157	688	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_FRM, val);
dvander@157	689	}
dvander@157	690	}
dvander@157	691
dvander@157	692	inline void WriteOp_Lref_Pri(JitWriter *jit)
dvander@157	693	{
dvander@157	694	//mov eax, [ebp+<val>]
dvander@157	695	//mov eax, [ebp+eax]
dvander@157	696	cell_t val = jit->read_cell();
dvander@157	697	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	698	{
dvander@157	699	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_DAT, (jit_int8_t)val);
dvander@157	700	} else {
dvander@157	701	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_DAT, val);
dvander@157	702	}
dvander@157	703	IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
dvander@157	704	}
dvander@157	705
dvander@157	706	inline void WriteOp_Lref_Alt(JitWriter *jit)
dvander@157	707	{
dvander@157	708	//mov edx, [ebp+<val>]
dvander@157	709	//mov edx, [ebp+edx]
dvander@157	710	cell_t val = jit->read_cell();
dvander@157	711	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	712	{
dvander@157	713	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_DAT, (jit_int8_t)val);
dvander@157	714	} else {
dvander@157	715	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_DAT, val);
dvander@157	716	}
dvander@157	717	IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_ALT, AMX_REG_DAT, AMX_REG_ALT, NOSCALE);
dvander@157	718	}
dvander@157	719
dvander@157	720	inline void WriteOp_Lref_S_Pri(JitWriter *jit)
dvander@157	721	{
dvander@157	722	//mov eax, [ebx+<val>]
dvander@157	723	//mov eax, [ebp+eax]
dvander@157	724	cell_t val = jit->read_cell();
dvander@157	725	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	726	{
dvander@157	727	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_FRM, (jit_int8_t)val);
dvander@157	728	} else {
dvander@157	729	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_FRM, val);
dvander@157	730	}
dvander@157	731	IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
dvander@157	732	}
dvander@157	733
dvander@157	734	inline void WriteOp_Lref_S_Alt(JitWriter *jit)
dvander@157	735	{
dvander@157	736	//mov edx, [ebx+<val>]
dvander@157	737	//mov edx, [ebp+edx]
dvander@157	738	cell_t val = jit->read_cell();
dvander@157	739	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	740	{
dvander@157	741	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_FRM, (jit_int8_t)val);
dvander@157	742	} else {
dvander@157	743	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_FRM, val);
dvander@157	744	}
dvander@157	745	IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_ALT, AMX_REG_DAT, AMX_REG_ALT, NOSCALE);
dvander@157	746	}
dvander@157	747
dvander@157	748	inline void WriteOp_Const_Pri(JitWriter *jit)
dvander@157	749	{
dvander@157	750	//mov eax, <val>
dvander@157	751	cell_t val = jit->read_cell();
dvander@157	752	IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, val);
dvander@157	753	}
dvander@157	754
dvander@157	755	inline void WriteOp_Const_Alt(JitWriter *jit)
dvander@157	756	{
dvander@157	757	//mov edx, <val>
dvander@157	758	cell_t val = jit->read_cell();
dvander@157	759	IA32_Mov_Reg_Imm32(jit, AMX_REG_ALT, val);
dvander@157	760	}
dvander@157	761
dvander@157	762	inline void WriteOp_Addr_Pri(JitWriter *jit)
dvander@157	763	{
dvander@157	764	//mov eax, [esi+frm]
dvander@157	765	//add eax, <val>
dvander@157	766	cell_t val = jit->read_cell();
dvander@157	767	IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_INFO, MOD_MEM_REG);
dvander@157	768	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	769	{
dvander@157	770	IA32_Add_Rm_Imm8(jit, AMX_REG_PRI, (jit_int8_t)val, MOD_REG);
dvander@157	771	} else {
dvander@157	772	IA32_Add_Eax_Imm32(jit, val);
dvander@157	773	}
dvander@157	774	}
dvander@157	775
dvander@157	776	inline void WriteOp_Addr_Alt(JitWriter *jit)
dvander@157	777	{
dvander@157	778	//mov edx, [esi+frm]
dvander@157	779	//add edx, <val>
dvander@157	780	cell_t val = jit->read_cell();
dvander@157	781	IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_INFO, MOD_MEM_REG);
dvander@157	782	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	783	{
dvander@157	784	IA32_Add_Rm_Imm8(jit, AMX_REG_ALT, (jit_int8_t)val, MOD_REG);
dvander@157	785	} else {
dvander@157	786	IA32_Add_Rm_Imm32(jit, AMX_REG_ALT, val, MOD_REG);
dvander@157	787	}
dvander@157	788	}
dvander@157	789
dvander@157	790	inline void WriteOp_Stor_Pri(JitWriter *jit)
dvander@157	791	{
dvander@157	792	//mov [ebp+<val>], eax
dvander@157	793	cell_t val = jit->read_cell();
dvander@157	794	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	795	{
dvander@157	796	IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_DAT, AMX_REG_PRI, (jit_int8_t)val);
dvander@157	797	} else {
dvander@157	798	IA32_Mov_Rm_Reg_Disp32(jit, AMX_REG_DAT, AMX_REG_PRI, val);
dvander@157	799	}
dvander@157	800	}
dvander@157	801
dvander@157	802	inline void WriteOp_Stor_Alt(JitWriter *jit)
dvander@157	803	{
dvander@157	804	//mov [ebp+<val>], edx
dvander@157	805	cell_t val = jit->read_cell();
dvander@157	806	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	807	{
dvander@157	808	IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_DAT, AMX_REG_ALT, (jit_int8_t)val);
dvander@157	809	} else {
dvander@157	810	IA32_Mov_Rm_Reg_Disp32(jit, AMX_REG_DAT, AMX_REG_ALT, val);
dvander@157	811	}
dvander@157	812	}
dvander@157	813
dvander@157	814	inline void WriteOp_Stor_S_Pri(JitWriter *jit)
dvander@157	815	{
dvander@157	816	//mov [ebx+<val>], eax
dvander@157	817	cell_t val = jit->read_cell();
dvander@157	818	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	819	{
dvander@157	820	IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_FRM, AMX_REG_PRI, (jit_int8_t)val);
dvander@157	821	} else {
dvander@157	822	IA32_Mov_Rm_Reg_Disp32(jit, AMX_REG_FRM, AMX_REG_PRI, val);
dvander@157	823	}
dvander@157	824	}
dvander@157	825
dvander@157	826	inline void WriteOp_Stor_S_Alt(JitWriter *jit)
dvander@157	827	{
dvander@157	828	//mov [ebx+<val>], edx
dvander@157	829	cell_t val = jit->read_cell();
dvander@157	830	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	831	{
dvander@157	832	IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_FRM, AMX_REG_ALT, (jit_int8_t)val);
dvander@157	833	} else {
dvander@157	834	IA32_Mov_Rm_Reg_Disp32(jit, AMX_REG_FRM, AMX_REG_ALT, val);
dvander@157	835	}
dvander@157	836	}
dvander@157	837
dvander@157	838	inline void WriteOp_Idxaddr(JitWriter *jit)
dvander@157	839	{
dvander@157	840	//lea eax, [edx+4*eax]
dvander@157	841	IA32_Lea_Reg_DispRegMult(jit, AMX_REG_PRI, AMX_REG_ALT, AMX_REG_PRI, SCALE4);
dvander@157	842	}
dvander@157	843
dvander@157	844	inline void WriteOp_Sref_Pri(JitWriter *jit)
dvander@157	845	{
dvander@157	846	//mov ecx, [ebp+<val>]
dvander@157	847	//mov [ebp+ecx], eax
dvander@157	848	cell_t val = jit->read_cell();
dvander@157	849	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	850	{
dvander@157	851	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val);
dvander@157	852	} else {
dvander@157	853	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val);
dvander@157	854	}
dvander@157	855	IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_PRI);
dvander@157	856	}
dvander@157	857
dvander@157	858	inline void WriteOp_Sref_Alt(JitWriter *jit)
dvander@157	859	{
dvander@157	860	//mov ecx, [ebp+<val>]
dvander@157	861	//mov [ebp+ecx], edx
dvander@157	862	cell_t val = jit->read_cell();
dvander@157	863	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	864	{
dvander@157	865	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val);
dvander@157	866	} else {
dvander@157	867	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val);
dvander@157	868	}
dvander@157	869	IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_ALT);
dvander@157	870	}
dvander@157	871
dvander@157	872	inline void WriteOp_Sref_S_Pri(JitWriter *jit)
dvander@157	873	{
dvander@157	874	//mov ecx, [ebx+<val>]
dvander@157	875	//mov [ebp+ecx], eax
dvander@157	876	cell_t val = jit->read_cell();
dvander@157	877	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	878	{
dvander@157	879	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val);
dvander@157	880	} else {
dvander@157	881	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val);
dvander@157	882	}
dvander@157	883	IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_PRI);
dvander@157	884	}
dvander@157	885
dvander@157	886	inline void WriteOp_Sref_S_Alt(JitWriter *jit)
dvander@157	887	{
dvander@157	888	//mov ecx, [ebx+<val>]
dvander@157	889	//mov [ebp+ecx], edx
dvander@157	890	cell_t val = jit->read_cell();
dvander@157	891	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	892	{
dvander@157	893	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val);
dvander@157	894	} else {
dvander@157	895	IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val);
dvander@157	896	}
dvander@157	897	IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_ALT);
dvander@157	898	}
dvander@157	899
dvander@157	900	inline void WriteOp_Pop_Pri(JitWriter *jit)
dvander@157	901	{
dvander@157	902	//mov eax, [edi]
dvander@157	903	//add edi, 4
dvander@157	904	IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_MEM_REG);
dvander@157	905	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	906	}
dvander@157	907
dvander@157	908	inline void WriteOp_Pop_Alt(JitWriter *jit)
dvander@157	909	{
dvander@157	910	//mov edx, [edi]
dvander@157	911	//add edi, 4
dvander@157	912	IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_STK, MOD_MEM_REG);
dvander@157	913	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	914	}
dvander@157	915
dvander@157	916	inline void WriteOp_Swap_Pri(JitWriter *jit)
dvander@157	917	{
dvander@157	918	//add [edi], eax
dvander@157	919	//sub eax, [edi]
dvander@157	920	//add [edi], eax
dvander@157	921	//neg eax
dvander@157	922	IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_PRI, MOD_MEM_REG);
dvander@157	923	IA32_Sub_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_MEM_REG);
dvander@157	924	IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_PRI, MOD_MEM_REG);
dvander@157	925	IA32_Neg_Rm(jit, AMX_REG_PRI, MOD_REG);
dvander@157	926	}
dvander@157	927
dvander@157	928	inline void WriteOp_Swap_Alt(JitWriter *jit)
dvander@157	929	{
dvander@157	930	//add [edi], edx
dvander@157	931	//sub edx, [edi]
dvander@157	932	//add [edi], edx
dvander@157	933	//neg edx
dvander@157	934	IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG);
dvander@157	935	IA32_Sub_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_STK, MOD_MEM_REG);
dvander@157	936	IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG);
dvander@157	937	IA32_Neg_Rm(jit, AMX_REG_ALT, MOD_REG);
dvander@157	938	}
dvander@157	939
dvander@157	940	inline void WriteOp_PushAddr(JitWriter *jit)
dvander@157	941	{
dvander@157	942	//mov ecx, [esi+frm] ;get address (offset from frame)
dvander@157	943	//sub edi, 4
dvander@157	944	//add ecx, <val>
dvander@157	945	//mov [edi], ecx
dvander@157	946	cell_t val = jit->read_cell();
dvander@157	947	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_INFO, MOD_MEM_REG);
dvander@157	948	IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	949	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	950	{
dvander@157	951	IA32_Add_Rm_Imm8(jit, AMX_REG_TMP, (jit_int8_t)val, MOD_REG);
dvander@157	952	} else {
dvander@157	953	IA32_Add_Rm_Imm32(jit, AMX_REG_TMP, val, MOD_REG);
dvander@157	954	}
dvander@157	955	IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_TMP, MOD_MEM_REG);
dvander@157	956	}
dvander@157	957
dvander@157	958	inline void WriteOp_Movs(JitWriter *jit)
dvander@157	959	{
dvander@157	960	//cld
dvander@157	961	//push esi
dvander@157	962	//push edi
dvander@157	963	//lea esi, [ebp+eax]
dvander@157	964	//lea edi, [ebp+edx]
dvander@157	965	//if dword:
dvander@157	966	// mov ecx, dword
dvander@157	967	// rep movsd
dvander@157	968	//if byte:
dvander@157	969	// mov ecx, byte
dvander@157	970	// rep movsb
dvander@157	971	//pop edi
dvander@157	972	//pop esi
dvander@157	973	cell_t val = jit->read_cell();
dvander@157	974	unsigned int dwords = val >> 2;
dvander@157	975	unsigned int bytes = val & 0x3;
dvander@157	976
dvander@157	977	IA32_Cld(jit);
dvander@157	978	IA32_Push_Reg(jit, REG_ESI);
dvander@157	979	IA32_Push_Reg(jit, REG_EDI);
dvander@157	980	IA32_Lea_Reg_DispEBPRegMult(jit, REG_ESI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
dvander@157	981	IA32_Lea_Reg_DispEBPRegMult(jit, REG_EDI, AMX_REG_DAT, AMX_REG_ALT, NOSCALE);
dvander@157	982	if (dwords)
dvander@157	983	{
dvander@157	984	IA32_Mov_Reg_Imm32(jit, REG_ECX, dwords);
dvander@157	985	IA32_Rep(jit);
dvander@157	986	IA32_Movsd(jit);
dvander@157	987	}
dvander@157	988	if (bytes)
dvander@157	989	{
dvander@157	990	IA32_Mov_Reg_Imm32(jit, REG_ECX, bytes);
dvander@157	991	IA32_Rep(jit);
dvander@157	992	IA32_Movsb(jit);
dvander@157	993	}
dvander@157	994	IA32_Pop_Reg(jit, REG_EDI);
dvander@157	995	IA32_Pop_Reg(jit, REG_ESI);
dvander@157	996	}
dvander@157	997
dvander@157	998	inline void WriteOp_Fill(JitWriter *jit)
dvander@157	999	{
dvander@157	1000	//push edi
dvander@157	1001	//lea edi, [ebp+edx]
dvander@157	1002	//mov ecx, <val> >> 2
dvander@157	1003	//cld
dvander@157	1004	//rep stosd
dvander@157	1005	//pop edi
dvander@157	1006	unsigned int val = jit->read_cell() >> 2;
dvander@157	1007
dvander@157	1008	IA32_Push_Reg(jit, REG_EDI);
dvander@157	1009	IA32_Lea_Reg_DispEBPRegMult(jit, REG_EDI, AMX_REG_DAT, AMX_REG_ALT, NOSCALE);
dvander@157	1010	IA32_Mov_Reg_Imm32(jit, REG_ECX, val);
dvander@157	1011	IA32_Cld(jit);
dvander@157	1012	IA32_Rep(jit);
dvander@157	1013	IA32_Stosd(jit);
dvander@157	1014	IA32_Pop_Reg(jit, REG_EDI);
dvander@157	1015	}
dvander@157	1016
dvander@157	1017	inline void WriteOp_GenArray(JitWriter *jit, bool autozero)
dvander@157	1018	{
dvander@157	1019	cell_t val = jit->read_cell();
dvander@157	1020	if (val == 1)
dvander@157	1021	{
dvander@157	1022	/* flat array. we can generate this without indirection tables. */
dvander@157	1023	/* Note that we can overwrite ALT because technically STACK should be destroying ALT */
dvander@157	1024	//mov edx, [esi+info.heap]
dvander@157	1025	//mov ecx, [edi]
dvander@157	1026	//mov [edi], edx ;store base of array into stack
dvander@157	1027	//lea edx, [edx+ecx*4] ;get the final new heap pointer
dvander@157	1028	//mov [esi+info.heap], edx ;store heap pointer back
dvander@157	1029	//add edx, ebp ;relocate
dvander@157	1030	//cmp edx, edi ;compare against stack pointer
dvander@157	1031	//jae :error ;error out if not enough space
dvander@157	1032	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_INFO, AMX_INFO_HEAP);
dvander@157	1033	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_MEM_REG);
dvander@157	1034	IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG);
dvander@157	1035	IA32_Lea_Reg_DispRegMult(jit, AMX_REG_ALT, AMX_REG_ALT, AMX_REG_TMP, SCALE4);
dvander@157	1036	IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_INFO, AMX_REG_ALT, AMX_INFO_HEAP);
dvander@157	1037	IA32_Add_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_DAT, MOD_REG);
dvander@157	1038	IA32_Cmp_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_STK, MOD_REG);
dvander@157	1039	IA32_Jump_Cond_Imm32_Abs(jit, CC_AE, ((CompData *)jit->data)->jit_error_heaplow);
dvander@157	1040
dvander@157	1041	WriteOp_Tracker_Push_Reg(jit, REG_ECX);
dvander@157	1042
dvander@157	1043	if (autozero)
dvander@157	1044	{
dvander@157	1045	/* Zero out the array - inline a quick fill */
dvander@157	1046	//push eax ;save pri
dvander@157	1047	//push edi ;save stk
dvander@157	1048	//xor eax, eax ;zero source
dvander@157	1049	//mov edi, [edi] ;get heap ptr out of the stack
dvander@157	1050	//add edi, ebp ;relocate
dvander@157	1051	//cld ;clear direction flag
dvander@157	1052	//rep stosd ;copy (note: ECX is sane from above)
dvander@157	1053	//pop edi ;pop stk
dvander@157	1054	//pop eax ;pop pri
dvander@157	1055	IA32_Push_Reg(jit, REG_EAX);
dvander@157	1056	IA32_Push_Reg(jit, REG_EDI);
dvander@157	1057	IA32_Xor_Reg_Rm(jit, REG_EAX, REG_EAX, MOD_REG);
dvander@157	1058	IA32_Mov_Reg_Rm(jit, REG_EDI, REG_EDI, MOD_MEM_REG);
dvander@157	1059	IA32_Add_Reg_Rm(jit, REG_EDI, REG_EBP, MOD_REG);
dvander@157	1060	IA32_Cld(jit);
dvander@157	1061	IA32_Rep(jit);
dvander@157	1062	IA32_Stosd(jit);
dvander@157	1063	IA32_Pop_Reg(jit, REG_EDI);
dvander@157	1064	IA32_Pop_Reg(jit, REG_EAX);
dvander@157	1065	}
dvander@157	1066	} else {
dvander@157	1067	//mov ecx, num_dims
dvander@157	1068	//mov edx, 0/1
dvander@157	1069	//call [genarray]
dvander@157	1070	IA32_Mov_Reg_Imm32(jit, AMX_REG_TMP, val);
dvander@157	1071	if (autozero)
dvander@157	1072	{
dvander@157	1073	IA32_Mov_Reg_Imm32(jit, REG_EDX, 1);
dvander@157	1074	} else {
dvander@157	1075	IA32_Mov_Reg_Imm32(jit, REG_EDX, 0);
dvander@157	1076	}
dvander@157	1077	jitoffs_t call = IA32_Call_Imm32(jit, 0);
dvander@157	1078	IA32_Write_Jump32(jit, call, ((CompData *)jit->data)->jit_genarray);
dvander@157	1079	}
dvander@157	1080	}
dvander@157	1081
dvander@157	1082	inline void WriteOp_Load_Both(JitWriter *jit)
dvander@157	1083	{
dvander@157	1084	WriteOp_Load_Pri(jit);
dvander@157	1085	WriteOp_Load_Alt(jit);
dvander@157	1086	}
dvander@157	1087
dvander@157	1088	inline void WriteOp_Load_S_Both(JitWriter *jit)
dvander@157	1089	{
dvander@157	1090	WriteOp_Load_S_Pri(jit);
dvander@157	1091	WriteOp_Load_S_Alt(jit);
dvander@157	1092	}
dvander@157	1093
dvander@157	1094	inline void WriteOp_Const(JitWriter *jit)
dvander@157	1095	{
dvander@157	1096	//mov [ebp+<addr>], <val>
dvander@157	1097	cell_t addr = jit->read_cell();
dvander@157	1098	cell_t val = jit->read_cell();
dvander@157	1099	if (addr < SCHAR_MAX && addr > SCHAR_MIN)
dvander@157	1100	{
dvander@157	1101	IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_DAT, val, (jit_int8_t)addr);
dvander@157	1102	} else {
dvander@157	1103	IA32_Mov_Rm_Imm32_Disp32(jit, AMX_REG_DAT, val, addr);
dvander@157	1104	}
dvander@157	1105	}
dvander@157	1106
dvander@157	1107	inline void WriteOp_Const_S(JitWriter *jit)
dvander@157	1108	{
dvander@157	1109	//mov [ebx+<offs>], <val>
dvander@157	1110	cell_t offs = jit->read_cell();
dvander@157	1111	cell_t val = jit->read_cell();
dvander@157	1112	if (offs < SCHAR_MAX && offs > SCHAR_MIN)
dvander@157	1113	{
dvander@157	1114	IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_FRM, val, (jit_int8_t)offs);
dvander@157	1115	} else {
dvander@157	1116	IA32_Mov_Rm_Imm32_Disp32(jit, AMX_REG_FRM, val, offs);
dvander@157	1117	}
dvander@157	1118	}
dvander@157	1119
dvander@157	1120	inline void WriteOp_Load_I(JitWriter *jit)
dvander@157	1121	{
dvander@157	1122	//mov eax, [ebp+eax]
dvander@157	1123	Write_Check_VerifyAddr(jit, AMX_REG_PRI);
dvander@157	1124	IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
dvander@157	1125	}
dvander@157	1126
dvander@157	1127	inline void WriteOp_Lodb_I(JitWriter *jit)
dvander@157	1128	{
dvander@157	1129	Write_Check_VerifyAddr(jit, AMX_REG_PRI);
dvander@157	1130
dvander@157	1131	//mov eax, [ebp+eax]
dvander@157	1132	IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
dvander@157	1133
dvander@157	1134	//and eax, <bitmask>
dvander@157	1135	cell_t val = jit->read_cell();
dvander@157	1136	switch(val)
dvander@157	1137	{
dvander@157	1138	case 1:
dvander@157	1139	{
faluco@831	1140	IA32_And_Eax_Imm32(jit, 0x000000FF);
dvander@157	1141	break;
dvander@157	1142	}
dvander@157	1143	case 2:
dvander@157	1144	{
faluco@831	1145	IA32_And_Eax_Imm32(jit, 0x0000FFFF);
dvander@157	1146	break;
dvander@157	1147	}
dvander@157	1148	}
dvander@157	1149	}
dvander@157	1150
dvander@157	1151	inline void WriteOp_Stor_I(JitWriter *jit)
dvander@157	1152	{
dvander@157	1153	//mov [ebp+edx], eax
dvander@157	1154	Write_Check_VerifyAddr(jit, AMX_REG_ALT);
dvander@157	1155	IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
dvander@157	1156	}
dvander@157	1157
dvander@157	1158	inline void WriteOp_Strb_I(JitWriter *jit)
dvander@157	1159	{
dvander@157	1160	Write_Check_VerifyAddr(jit, AMX_REG_ALT);
dvander@157	1161	//mov [ebp+edx], eax
dvander@157	1162	cell_t val = jit->read_cell();
dvander@157	1163	switch (val)
dvander@157	1164	{
dvander@157	1165	case 1:
dvander@157	1166	{
dvander@157	1167	IA32_Mov_Rm8EBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
dvander@157	1168	break;
dvander@157	1169	}
dvander@157	1170	case 2:
dvander@157	1171	{
dvander@157	1172	IA32_Mov_Rm16EBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
dvander@157	1173	break;
dvander@157	1174	}
dvander@157	1175	case 4:
dvander@157	1176	{
dvander@157	1177	IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
dvander@157	1178	break;
dvander@157	1179	}
dvander@157	1180	}
dvander@157	1181	}
dvander@157	1182
dvander@157	1183	inline void WriteOp_Lidx(JitWriter *jit)
dvander@157	1184	{
dvander@157	1185	//lea eax, [edx+4*eax]
dvander@157	1186	//mov eax, [ebp+eax]
dvander@157	1187	IA32_Lea_Reg_DispRegMult(jit, AMX_REG_PRI, AMX_REG_ALT, AMX_REG_PRI, SCALE4);
dvander@157	1188	Write_Check_VerifyAddr(jit, AMX_REG_PRI);
dvander@157	1189	IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
dvander@157	1190	}
dvander@157	1191
dvander@157	1192	inline void WriteOp_Stack(JitWriter *jit)
dvander@157	1193	{
dvander@157	1194	//add edi, <val>
dvander@157	1195	cell_t val = jit->read_cell();
dvander@157	1196	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	1197	{
dvander@157	1198	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, (jit_int8_t)val, MOD_REG);
dvander@157	1199	} else {
dvander@157	1200	IA32_Add_Rm_Imm32(jit, AMX_REG_STK, val, MOD_REG);
dvander@157	1201	}
dvander@157	1202
dvander@157	1203	if (val > 0)
dvander@157	1204	{
dvander@157	1205	Write_CheckStack_Min(jit);
dvander@157	1206	} else if (val < 0) {
dvander@157	1207	Write_CheckStack_Low(jit);
dvander@157	1208	}
dvander@157	1209	}
dvander@157	1210
dvander@157	1211	inline void WriteOp_Heap(JitWriter *jit)
dvander@157	1212	{
dvander@157	1213	//mov edx, [esi+hea]
dvander@157	1214	//add [esi+hea], <val>
dvander@157	1215	cell_t val = jit->read_cell();
dvander@157	1216	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_INFO, AMX_INFO_HEAP);
dvander@157	1217	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	1218	{
dvander@157	1219	IA32_Add_Rm_Imm8_Disp8(jit, AMX_REG_INFO, (jit_int8_t)val, AMX_INFO_HEAP);
dvander@157	1220	} else {
dvander@157	1221	IA32_Add_Rm_Imm32_Disp8(jit, AMX_REG_INFO, val, AMX_INFO_HEAP);
dvander@157	1222	}
dvander@157	1223
dvander@157	1224	/* NOTE: Backwards from op.stack */
dvander@157	1225	if (val > 0)
dvander@157	1226	{
dvander@157	1227	Write_CheckHeap_Low(jit);
dvander@157	1228	} else if (val < 0) {
dvander@157	1229	Write_CheckHeap_Min(jit);
dvander@157	1230	}
dvander@157	1231	}
dvander@157	1232
dvander@157	1233	inline void WriteOp_SDiv(JitWriter *jit)
dvander@157	1234	{
dvander@157	1235	//mov ecx, edx
dvander@157	1236	//mov edx, eax
dvander@157	1237	//sar edx, 31
dvander@157	1238	//idiv ecx
dvander@157	1239	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
dvander@157	1240	IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_PRI, MOD_REG);
dvander@157	1241	IA32_Sar_Rm_Imm8(jit, AMX_REG_ALT, 31, MOD_REG);
dvander@157	1242	Write_Check_DivZero(jit, AMX_REG_TMP);
dvander@157	1243	IA32_IDiv_Rm(jit, AMX_REG_TMP, MOD_REG);
dvander@157	1244	}
dvander@157	1245
dvander@157	1246	inline void WriteOp_SDiv_Alt(JitWriter *jit)
dvander@157	1247	{
dvander@157	1248	//mov ecx, eax
dvander@157	1249	//mov eax, edx
dvander@157	1250	//sar edx, 31
dvander@157	1251	//idiv ecx
dvander@157	1252	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_PRI, MOD_REG);
dvander@157	1253	IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	1254	IA32_Sar_Rm_Imm8(jit, AMX_REG_ALT, 31, MOD_REG);
dvander@157	1255	Write_Check_DivZero(jit, AMX_REG_TMP);
dvander@157	1256	IA32_IDiv_Rm(jit, AMX_REG_TMP, MOD_REG);
dvander@157	1257	}
dvander@157	1258
dvander@157	1259	inline void WriteOp_Retn(JitWriter *jit)
dvander@157	1260	{
dvander@157	1261	//mov ebx, [edi+4] - get old frm
dvander@157	1262	//add edi, 8 - pop stack
dvander@157	1263	//mov [esi+frm], ebx - restore frame pointer
dvander@157	1264	//add ebx, ebp - relocate
dvander@157	1265	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_FRM, AMX_REG_STK, 4);
dvander@157	1266	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG);
dvander@157	1267	IA32_Mov_Rm_Reg(jit, AMX_REG_INFO, AMX_REG_FRM, MOD_MEM_REG);
dvander@157	1268	IA32_Add_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_DAT, MOD_REG);
dvander@157	1269
dvander@157	1270	/* pop params */
dvander@157	1271	//mov ecx, [edi]
dvander@157	1272	//lea edi, [edi+ecx*4+4]
dvander@157	1273	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_MEM_REG);
dvander@157	1274	IA32_Lea_Reg_DispRegMultImm8(jit, AMX_REG_STK, AMX_REG_STK, AMX_REG_TMP, SCALE4, 4);
dvander@157	1275
dvander@157	1276	//ret - return (EIP on real stack!)
dvander@157	1277	IA32_Return(jit);
dvander@157	1278	}
dvander@157	1279
dvander@157	1280	inline void WriteOp_Call(JitWriter *jit)
dvander@157	1281	{
dvander@157	1282	cell_t offs = jit->read_cell();
dvander@157	1283
dvander@157	1284	jitoffs_t jmp = IA32_Call_Imm32(jit, 0);
dvander@157	1285	IA32_Write_Jump32(jit, jmp, RelocLookup(jit, offs, false));
dvander@157	1286	}
dvander@157	1287
dvander@157	1288	inline void WriteOp_Bounds(JitWriter *jit)
dvander@157	1289	{
dvander@157	1290	cell_t val = jit->read_cell();
dvander@157	1291
dvander@157	1292	//cmp eax, <val>
dvander@157	1293	//ja :error
dvander@157	1294	if (val < SCHAR_MAX && val > SCHAR_MIN)
dvander@157	1295	{
dvander@157	1296	IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_PRI, (jit_int8_t)val);
dvander@157	1297	} else {
dvander@157	1298	IA32_Cmp_Eax_Imm32(jit, val);
dvander@157	1299	}
dvander@157	1300	IA32_Jump_Cond_Imm32_Abs(jit, CC_A, ((CompData *)jit->data)->jit_error_bounds);
dvander@157	1301	}
dvander@157	1302
dvander@157	1303	inline void WriteOp_Halt(JitWriter *jit)
dvander@157	1304	{
faluco@853	1305	AlignMe(jit);
faluco@853	1306
dvander@157	1307	//mov ecx, [esi+ret]
dvander@157	1308	//mov [ecx], eax
dvander@157	1309	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_RETVAL);
dvander@157	1310	IA32_Mov_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_PRI, MOD_MEM_REG);
dvander@157	1311
dvander@157	1312	/* :TODO:
dvander@157	1313	* We don't support sleeping or halting with weird values.
dvander@157	1314	* So we're omitting the mov eax <val> that was here.
dvander@157	1315	*/
dvander@157	1316	jit->read_cell();
dvander@157	1317
dvander@157	1318	CompData data = (CompData )jit->data;
dvander@157	1319	IA32_Jump_Imm32_Abs(jit, data->jit_return);
dvander@157	1320	}
dvander@157	1321
dvander@157	1322	inline void WriteOp_Break(JitWriter *jit)
dvander@157	1323	{
dvander@157	1324	CompData data = (CompData )jit->data;
dvander@157	1325	if (data->debug)
dvander@157	1326	{
dvander@243	1327	//jit->write_ubyte(IA32_INT3);
dvander@157	1328	//mov ecx, <cip>
dvander@157	1329	jitoffs_t wr = IA32_Mov_Reg_Imm32(jit, AMX_REG_TMP, 0);
dvander@157	1330	jitoffs_t save = jit->get_outputpos();
dvander@157	1331	jit->set_outputpos(wr);
dvander@241	1332	jit->write_uint32((uint32_t)(wr));
dvander@157	1333	jit->set_outputpos(save);
dvander@157	1334	wr = IA32_Call_Imm32(jit, 0);
dvander@157	1335	IA32_Write_Jump32(jit, wr, data->jit_break);
dvander@157	1336	}
dvander@157	1337	}
dvander@157	1338
dvander@157	1339	inline void WriteOp_Jump(JitWriter *jit)
dvander@157	1340	{
dvander@157	1341	//jmp <offs>
dvander@157	1342	cell_t amx_offs = jit->read_cell();
dvander@157	1343	IA32_Jump_Imm32_Abs(jit, RelocLookup(jit, amx_offs, false));
dvander@157	1344	}
dvander@157	1345
dvander@157	1346	inline void WriteOp_Jzer(JitWriter *jit)
dvander@157	1347	{
dvander@157	1348	//test eax, eax
dvander@157	1349	//jz <target>
dvander@157	1350	cell_t target = jit->read_cell();
dvander@157	1351	IA32_Test_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG);
dvander@157	1352	IA32_Jump_Cond_Imm32_Abs(jit, CC_Z, RelocLookup(jit, target, false));
dvander@157	1353	}
dvander@157	1354
dvander@157	1355	inline void WriteOp_Jnz(JitWriter *jit)
dvander@157	1356	{
dvander@157	1357	//test eax, eax
dvander@157	1358	//jnz <target>
dvander@157	1359	cell_t target = jit->read_cell();
dvander@157	1360	IA32_Test_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG);
dvander@157	1361	IA32_Jump_Cond_Imm32_Abs(jit, CC_NZ, RelocLookup(jit, target, false));
dvander@157	1362	}
dvander@157	1363
dvander@157	1364	inline void WriteOp_Jeq(JitWriter *jit)
dvander@157	1365	{
dvander@157	1366	//cmp eax, edx
dvander@157	1367	//je <target>
dvander@157	1368	cell_t target = jit->read_cell();
dvander@157	1369	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	1370	IA32_Jump_Cond_Imm32_Abs(jit, CC_E, RelocLookup(jit, target, false));
dvander@157	1371	}
dvander@157	1372
dvander@157	1373	inline void WriteOp_Jneq(JitWriter *jit)
dvander@157	1374	{
dvander@157	1375	//cmp eax, edx
dvander@157	1376	//jne <target>
dvander@157	1377	cell_t target = jit->read_cell();
dvander@157	1378	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	1379	IA32_Jump_Cond_Imm32_Abs(jit, CC_NE, RelocLookup(jit, target, false));
dvander@157	1380	}
dvander@157	1381
dvander@157	1382	inline void WriteOp_Jsless(JitWriter *jit)
dvander@157	1383	{
dvander@157	1384	//cmp eax, edx
dvander@157	1385	//jl <target>
dvander@157	1386	cell_t target = jit->read_cell();
dvander@157	1387	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	1388	IA32_Jump_Cond_Imm32_Abs(jit, CC_L, RelocLookup(jit, target, false));
dvander@157	1389	}
dvander@157	1390
dvander@157	1391	inline void WriteOp_Jsleq(JitWriter *jit)
dvander@157	1392	{
dvander@157	1393	//cmp eax, edx
dvander@157	1394	//jle <target>
dvander@157	1395	cell_t target = jit->read_cell();
dvander@157	1396	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	1397	IA32_Jump_Cond_Imm32_Abs(jit, CC_LE, RelocLookup(jit, target, false));
dvander@157	1398	}
dvander@157	1399
dvander@157	1400	inline void WriteOp_JsGrtr(JitWriter *jit)
dvander@157	1401	{
dvander@157	1402	//cmp eax, edx
dvander@157	1403	//jg <target>
dvander@157	1404	cell_t target = jit->read_cell();
dvander@157	1405	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	1406	IA32_Jump_Cond_Imm32_Abs(jit, CC_G, RelocLookup(jit, target, false));
dvander@157	1407	}
dvander@157	1408
dvander@157	1409	inline void WriteOp_JsGeq(JitWriter *jit)
dvander@157	1410	{
dvander@157	1411	//cmp eax, edx
dvander@157	1412	//jge <target>
dvander@157	1413	cell_t target = jit->read_cell();
dvander@157	1414	IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
dvander@157	1415	IA32_Jump_Cond_Imm32_Abs(jit, CC_GE, RelocLookup(jit, target, false));
dvander@157	1416	}
dvander@157	1417
dvander@157	1418	inline void WriteOp_Switch(JitWriter *jit)
dvander@157	1419	{
dvander@157	1420	cell_t offs = jit->read_cell();
dvander@157	1421	cell_t tbl = (cell_t )((char *)jit->inbase + offs + sizeof(cell_t));
dvander@157	1422
dvander@157	1423	struct casetbl
dvander@157	1424	{
dvander@157	1425	cell_t val;
dvander@157	1426	cell_t offs;
dvander@157	1427	};
dvander@157	1428
dvander@157	1429	/* Read the number of cases, then advance by one */
dvander@157	1430	cell_t num_cases = *tbl++;
dvander@157	1431	if (!num_cases)
dvander@157	1432	{
dvander@157	1433	/* Special treatment for 0 cases */
dvander@157	1434	//jmp <default>
dvander@157	1435	IA32_Jump_Imm32_Abs(jit, RelocLookup(jit, *tbl, false));
dvander@157	1436	} else {
dvander@157	1437	/* Check if the case layout is fully sequential */
dvander@157	1438	casetbl iter = (casetbl )(tbl + 1);
dvander@157	1439	casetbl *cases = iter;
dvander@157	1440	cell_t first = iter[0].val;
dvander@157	1441	cell_t last = first;
dvander@157	1442	bool sequential = true;
dvander@157	1443	for (cell_t i=1; i<num_cases; i++)
dvander@157	1444	{
dvander@157	1445	if (iter[i].val != ++last)
dvander@157	1446	{
dvander@157	1447	sequential = false;
dvander@157	1448	break;
dvander@157	1449	}
dvander@157	1450	}
dvander@157	1451	/* Time to generate.
dvander@157	1452	* First check whether the bounds are correct: if (a < LOW \|\| a > HIGH)
dvander@157	1453	* This check is valid for both sequential and non-sequential.
dvander@157	1454	*/
dvander@157	1455	cell_t low_bound = cases[0].val;
dvander@157	1456	if (low_bound != 0)
dvander@157	1457	{
dvander@157	1458	/* negate it so we'll get a lower bound of 0 */
dvander@157	1459	//lea ecx, [eax-<LOWER_BOUND>]
dvander@157	1460	low_bound = -low_bound;
dvander@157	1461	if (low_bound > SCHAR_MIN && low_bound < SCHAR_MAX)
dvander@157	1462	{
dvander@157	1463	IA32_Lea_DispRegImm8(jit, AMX_REG_TMP, AMX_REG_PRI, low_bound);
dvander@157	1464	} else {
dvander@157	1465	IA32_Lea_DispRegImm32(jit, AMX_REG_TMP, AMX_REG_PRI, low_bound);
dvander@157	1466	}
faluco@788	1467	} else {
faluco@788	1468	//mov ecx, eax
faluco@788	1469	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_PRI, MOD_REG);
dvander@157	1470	}
dvander@157	1471	cell_t high_bound = abs(cases[0].val - cases[num_cases-1].val);
dvander@157	1472	//cmp ecx, <UPPER BOUND BOUND>
dvander@157	1473	if (high_bound > SCHAR_MIN && high_bound < SCHAR_MAX)
dvander@157	1474	{
dvander@157	1475	IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_TMP, high_bound);
dvander@157	1476	} else {
dvander@157	1477	IA32_Cmp_Rm_Imm32(jit, MOD_REG, AMX_REG_TMP, high_bound);
dvander@157	1478	}
dvander@157	1479	//ja <default case>
dvander@157	1480	IA32_Jump_Cond_Imm32_Abs(jit, CC_A, RelocLookup(jit, *tbl, false));
dvander@157	1481
dvander@157	1482	/**
dvander@157	1483	* Now we've taken the default case out of the way, it's time to do the
dvander@157	1484	* full check, which is different for sequential vs. non-sequential.
dvander@157	1485	*/
dvander@157	1486	if (sequential)
dvander@157	1487	{
dvander@157	1488	/* we're now theoretically guaranteed to be jumping to a correct offset.
dvander@157	1489	* ECX still has the correctly bound offset in it, luckily!
dvander@157	1490	* thus, we simply need to relocate ECX and store the cases.
dvander@157	1491	*/
dvander@157	1492	//lea ecx, [ecx*4]
dvander@157	1493	//add ecx, <case table start>
dvander@157	1494	IA32_Lea_Reg_RegMultImm32(jit, AMX_REG_TMP, AMX_REG_TMP, SCALE4, 0);
dvander@157	1495	jitoffs_t tbl_offs = IA32_Add_Rm_Imm32_Later(jit, AMX_REG_TMP, MOD_REG);
dvander@157	1496	IA32_Jump_Rm(jit, AMX_REG_TMP, MOD_MEM_REG);
dvander@157	1497	/* The case table starts here. Go back and write the output pointer. */
dvander@157	1498	jitoffs_t cur_pos = jit->get_outputpos();
dvander@157	1499	jit->set_outputpos(tbl_offs);
dvander@157	1500	jit->write_uint32((jit_uint32_t)(jit->outbase + cur_pos));
dvander@157	1501	jit->set_outputpos(cur_pos);
dvander@157	1502	//now we can write the case table, finally!
dvander@157	1503	jit_uint32_t base = (jit_uint32_t)jit->outbase;
dvander@157	1504	for (cell_t i=0; i<num_cases; i++)
dvander@157	1505	{
dvander@157	1506	jit->write_uint32(base + RelocLookup(jit, cases[i].offs, false));
dvander@157	1507	}
dvander@157	1508	} else {
dvander@157	1509	/* The slow version. Go through each case and generate a check.
dvander@157	1510	* In the future we should replace case tables of more than ~8 cases with a
dvander@157	1511	* hash table lookup.
dvander@157	1512	* :THOUGHT: Another method of optimizing this - fill in the gaps with jumps to the default case,
dvander@157	1513	* but only if we're under N cases or so!
dvander@157	1514	* :THOUGHT: Write out a static btree lookup :)
dvander@157	1515	*/
dvander@157	1516	cell_t val;
dvander@157	1517	for (cell_t i=0; i<num_cases; i++)
dvander@157	1518	{
dvander@157	1519	val = cases[i].val;
dvander@157	1520	//cmp eax, <val> OR cmp al, <val>
dvander@157	1521	if (val > SCHAR_MIN && val < SCHAR_MAX)
dvander@157	1522	{
dvander@157	1523	IA32_Cmp_Al_Imm8(jit, val);
dvander@157	1524	} else {
dvander@157	1525	IA32_Cmp_Eax_Imm32(jit, cases[i].val);
dvander@157	1526	}
dvander@157	1527	IA32_Jump_Cond_Imm32_Abs(jit, CC_E, RelocLookup(jit, cases[i].offs, false));
dvander@157	1528	}
dvander@157	1529	/* After all this, jump to the default case! */
dvander@157	1530	IA32_Jump_Imm32_Abs(jit, RelocLookup(jit, *tbl, false));
dvander@157	1531	}
dvander@157	1532	}
dvander@157	1533	}
dvander@157	1534
dvander@157	1535	inline void WriteOp_Casetbl(JitWriter *jit)
dvander@157	1536	{
dvander@157	1537	/* do nothing here, switch does all ze work */
dvander@157	1538	cell_t num_cases = jit->read_cell();
dvander@157	1539
dvander@157	1540	/* Two cells per case, one extra case for the default jump */
dvander@157	1541	num_cases = (num_cases * 2) + 1;
dvander@157	1542	jit->inptr += num_cases;
dvander@157	1543	}
dvander@157	1544
dvander@157	1545	inline void WriteOp_Sysreq_C(JitWriter *jit)
dvander@157	1546	{
dvander@157	1547	/* store the number of parameters on the stack,
dvander@157	1548	* and store the native index as well.
dvander@157	1549	*/
dvander@157	1550	cell_t native_index = jit->read_cell();
dvander@157	1551
dvander@157	1552	if ((uint32_t)native_index >= ((CompData*)jit->data)->plugin->info.natives_num)
dvander@157	1553	{
dvander@157	1554	((CompData *)jit->data)->error_set = SP_ERROR_INSTRUCTION_PARAM;
dvander@157	1555	return;
dvander@157	1556	}
dvander@157	1557
dvander@157	1558	//mov ecx, <native_index>
dvander@157	1559	IA32_Mov_Reg_Imm32(jit, REG_ECX, native_index);
dvander@157	1560
dvander@157	1561	jitoffs_t call = IA32_Call_Imm32(jit, 0);
dvander@157	1562	IA32_Write_Jump32(jit, call, ((CompData *)jit->data)->jit_sysreq_c);
dvander@157	1563	}
dvander@157	1564
dvander@157	1565	inline void WriteOp_Sysreq_N_NoInline(JitWriter *jit)
dvander@157	1566	{
dvander@157	1567	/* store the number of parameters on the stack,
dvander@157	1568	* and store the native index as well.
dvander@157	1569	*/
dvander@157	1570	cell_t native_index = jit->read_cell();
dvander@157	1571	cell_t num_params = jit->read_cell();
dvander@157	1572
dvander@157	1573	if ((uint32_t)native_index >= ((CompData*)jit->data)->plugin->info.natives_num)
dvander@157	1574	{
dvander@157	1575	((CompData *)jit->data)->error_set = SP_ERROR_INSTRUCTION_PARAM;
dvander@157	1576	return;
dvander@157	1577	}
dvander@157	1578
dvander@157	1579	//mov eax, <num_params>
dvander@157	1580	//mov ecx, <native_index>
dvander@157	1581	IA32_Mov_Reg_Imm32(jit, REG_EAX, num_params);
dvander@157	1582	IA32_Mov_Reg_Imm32(jit, REG_ECX, native_index);
dvander@157	1583
dvander@157	1584	jitoffs_t call = IA32_Call_Imm32(jit, 0);
dvander@157	1585	IA32_Write_Jump32(jit, call, ((CompData *)jit->data)->jit_sysreq_n);
dvander@157	1586	}
dvander@157	1587
dvander@157	1588	inline void WriteOp_Sysreq_N(JitWriter *jit)
dvander@157	1589	{
dvander@157	1590	/* The big daddy of opcodes. */
dvander@157	1591	cell_t native_index = jit->read_cell();
dvander@157	1592	cell_t num_params = jit->read_cell();
dvander@157	1593	CompData data = (CompData )jit->data;
dvander@157	1594
dvander@157	1595	if ((uint32_t)native_index >= data->plugin->info.natives_num)
dvander@157	1596	{
dvander@157	1597	data->error_set = SP_ERROR_INSTRUCTION_PARAM;
dvander@157	1598	return;
dvander@157	1599	}
dvander@157	1600
dvander@157	1601	/* store the number of parameters on the stack */
dvander@157	1602	//mov [edi-4], num_params
dvander@157	1603	//sub edi, 4
dvander@157	1604	IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_STK, num_params, -4);
dvander@157	1605	IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
dvander@157	1606
dvander@157	1607	/* save registers we will need */
dvander@157	1608	//push edx
dvander@157	1609	IA32_Push_Reg(jit, AMX_REG_ALT);
dvander@157	1610
dvander@157	1611	/* push some callback stuff */
dvander@157	1612	//push edi ; stack
dvander@157	1613	//push <native> ; native index
dvander@157	1614	IA32_Push_Reg(jit, AMX_REG_STK);
dvander@157	1615	if (native_index < SCHAR_MAX && native_index > SCHAR_MIN)
dvander@157	1616	{
dvander@157	1617	IA32_Push_Imm8(jit, (jit_int8_t)native_index);
dvander@157	1618	} else {
dvander@157	1619	IA32_Push_Imm32(jit, native_index);
dvander@157	1620	}
dvander@157	1621
dvander@157	1622	/* Relocate stack, heap, frm information, then store back */
dvander@157	1623	//mov eax, [esi+context]
dvander@157	1624	//mov ecx, [esi+hea]
dvander@157	1625	//sub edi, ebp
dvander@157	1626	//mov [eax+hp], ecx
dvander@157	1627	//mov ecx, [esi]
dvander@157	1628	//mov [eax+sp], edi
dvander@157	1629	//mov [eax+frm], ecx
dvander@157	1630	IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, AMX_REG_INFO, AMX_INFO_CONTEXT);
dvander@157	1631	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_HEAP);
dvander@157	1632	IA32_Sub_Reg_Rm(jit, AMX_REG_STK, AMX_REG_DAT, MOD_REG);
dvander@157	1633	IA32_Mov_Rm_Reg_Disp8(jit, REG_EAX, AMX_REG_TMP, offsetof(sp_context_t, hp));
dvander@157	1634	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_INFO_FRM, MOD_MEM_REG);
dvander@157	1635	IA32_Mov_Rm_Reg_Disp8(jit, REG_EAX, AMX_REG_STK, offsetof(sp_context_t, sp));
dvander@157	1636	IA32_Mov_Rm_Reg_Disp8(jit, REG_EAX, AMX_REG_TMP, offsetof(sp_context_t, frm));
dvander@157	1637
dvander@157	1638	/* finally, push the last parameter and make the call */
dvander@157	1639	//push eax ; context
dvander@157	1640	//call NativeCallback
dvander@157	1641	IA32_Push_Reg(jit, REG_EAX);
dvander@157	1642	jitoffs_t call = IA32_Call_Imm32(jit, 0);
dvander@157	1643	if (!data->debug)
dvander@157	1644	{
dvander@350	1645	IA32_Write_Jump32_Abs(jit, call, (void *)NativeCallback);
dvander@157	1646	} else {
dvander@350	1647	IA32_Write_Jump32_Abs(jit, call, (void *)NativeCallback_Debug);
dvander@157	1648	}
dvander@157	1649
dvander@157	1650	/* check for errors */
dvander@157	1651	//mov ecx, [esi+context]
dvander@157	1652	//cmp [ecx+err], 0
dvander@157	1653	//jnz :error
dvander@157	1654	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_CONTEXT);
dvander@237	1655	IA32_Cmp_Rm_Disp8_Imm8(jit, AMX_REG_TMP, offsetof(sp_context_t, n_err), 0);
dvander@157	1656	IA32_Jump_Cond_Imm32_Abs(jit, CC_NZ, data->jit_extern_error);
dvander@157	1657
dvander@157	1658	/* restore what we damaged */
dvander@157	1659	//add esp, 4*3
dvander@157	1660	//add edi, ebp
dvander@157	1661	//pop edx
dvander@157	1662	IA32_Add_Rm_Imm8(jit, REG_ESP, 4*3, MOD_REG);
dvander@157	1663	IA32_Add_Reg_Rm(jit, AMX_REG_STK, AMX_REG_DAT, MOD_REG);
dvander@157	1664	IA32_Pop_Reg(jit, AMX_REG_ALT);
dvander@157	1665
dvander@157	1666	/* pop the stack. do not check the margins.
dvander@157	1667	* Note that this is not a true macro - we don't bother to
dvander@157	1668	* set ALT here because nothing will be using it.
dvander@157	1669	*/
dvander@157	1670	num_params++;
dvander@157	1671	num_params *= 4;
dvander@157	1672	//add edi, <val*4+4>
dvander@157	1673	if (num_params < SCHAR_MAX && num_params > SCHAR_MIN)
dvander@157	1674	{
dvander@157	1675	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, (jit_int8_t)num_params, MOD_REG);
dvander@157	1676	} else {
dvander@157	1677	IA32_Add_Rm_Imm32(jit, AMX_REG_STK, num_params, MOD_REG);
dvander@157	1678	}
dvander@157	1679	}
dvander@157	1680
dvander@157	1681	inline void WriteOp_Tracker_Push_C(JitWriter *jit)
dvander@157	1682	{
dvander@157	1683	CompData data = (CompData )jit->data;
dvander@157	1684	cell_t val = jit->read_cell();
dvander@157	1685
dvander@157	1686	/* Save registers that may be damaged by the call */
dvander@157	1687	//push eax
dvander@157	1688	//push edx
dvander@157	1689	IA32_Push_Reg(jit, AMX_REG_PRI);
dvander@157	1690	IA32_Push_Reg(jit, AMX_REG_ALT);
dvander@157	1691
dvander@157	1692	/* Get the context ptr, push it and call the check */
dvander@157	1693	//mov eax, [esi+context]
dvander@157	1694	//push eax
dvander@157	1695	//call JIT_VerifyOrAllocateTracker
dvander@157	1696	IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, AMX_REG_INFO, AMX_INFO_CONTEXT);
dvander@157	1697	IA32_Push_Reg(jit, REG_EAX);
dvander@157	1698	jitoffs_t call = IA32_Call_Imm32(jit, 0);
dvander@350	1699	IA32_Write_Jump32_Abs(jit, call, (void *)JIT_VerifyOrAllocateTracker);
dvander@157	1700
dvander@157	1701	/* Check for errors */
dvander@237	1702	//cmp eax, 0
dvander@157	1703	//jnz :error
faluco@238	1704	IA32_Cmp_Rm_Imm8(jit, MOD_REG, REG_EAX, 0);
dvander@237	1705	IA32_Jump_Cond_Imm32_Abs(jit, CC_NZ, data->jit_return);
dvander@237	1706
dvander@237	1707	/* Restore */
dvander@237	1708	//pop eax
dvander@157	1709	IA32_Pop_Reg(jit, REG_EAX);
dvander@157	1710
dvander@157	1711	/* Push the value into the stack and increment pCur */
dvander@157	1712	//mov edx, [eax+vm[]]
dvander@157	1713	//mov ecx, [edx+pcur]
dvander@157	1714	//add [edx+pcur], 4
dvander@157	1715	//mov [ecx], <val>*4 ; we want the count in bytes not in cells
dvander@157	1716	IA32_Mov_Reg_Rm_Disp8(jit, REG_EDX, REG_EAX, offsetof(sp_context_t, vm[JITVARS_TRACKER]));
dvander@157	1717	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, REG_EDX, offsetof(tracker_t, pCur));
dvander@157	1718	IA32_Add_Rm_Imm8_Disp8(jit, REG_EDX, 4, offsetof(tracker_t, pCur));
dvander@157	1719	IA32_Mov_Rm_Imm32(jit, AMX_REG_TMP, val*4, MOD_MEM_REG);
dvander@157	1720
dvander@157	1721	/* Restore PRI & ALT */
dvander@157	1722	//pop edx
dvander@157	1723	//pop eax
dvander@157	1724	IA32_Pop_Reg(jit, AMX_REG_ALT);
dvander@157	1725	IA32_Pop_Reg(jit, AMX_REG_PRI);
dvander@157	1726	}
dvander@157	1727
dvander@157	1728	inline void WriteOp_Tracker_Pop_SetHeap(JitWriter *jit)
dvander@157	1729	{
dvander@157	1730	CompData data = (CompData )jit->data;
dvander@157	1731
dvander@157	1732	/* Save registers that may be damaged by the call */
dvander@157	1733	//push eax
dvander@157	1734	//push edx
dvander@157	1735	IA32_Push_Reg(jit, AMX_REG_PRI);
dvander@157	1736	IA32_Push_Reg(jit, AMX_REG_ALT);
dvander@157	1737
dvander@157	1738	/* Get the context ptr, push it and call the check */
dvander@157	1739	//mov eax, [esi+context]
dvander@157	1740	//push eax
dvander@157	1741	//call JIT_VerifyLowBoundTracker
dvander@157	1742	IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, AMX_REG_INFO, AMX_INFO_CONTEXT);
dvander@157	1743	IA32_Push_Reg(jit, REG_EAX);
dvander@157	1744	jitoffs_t call = IA32_Call_Imm32(jit, 0);
dvander@350	1745	IA32_Write_Jump32_Abs(jit, call, (void *)JIT_VerifyLowBoundTracker);
dvander@157	1746
dvander@157	1747	/* Check for errors */
dvander@237	1748	//cmp eax, 0
dvander@157	1749	//jnz :error
faluco@238	1750	IA32_Cmp_Rm_Imm8(jit, MOD_REG, REG_EAX, 0);
dvander@237	1751	IA32_Jump_Cond_Imm32_Abs(jit, CC_NZ, data->jit_return);
dvander@237	1752
dvander@237	1753	/* Restore */
dvander@237	1754	//pop eax
dvander@157	1755	IA32_Pop_Reg(jit, REG_EAX);
dvander@157	1756
dvander@157	1757	/* Pop the value from the stack and decrease the heap by it*/
dvander@157	1758	//mov edx, [eax+vm[]]
dvander@157	1759	//sub [edx+pcur], 4
dvander@157	1760	//mov ecx, [edx+pcur]
dvander@157	1761	//mov ecx, [ecx]
dvander@157	1762	//sub [esi+hea], ecx
dvander@157	1763	IA32_Mov_Reg_Rm_Disp8(jit, REG_EDX, REG_EAX, offsetof(sp_context_t, vm[JITVARS_TRACKER]));
dvander@157	1764	IA32_Sub_Rm_Imm8_Disp8(jit, REG_EDX, 4, offsetof(tracker_t, pCur));
dvander@157	1765	IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, REG_EDX, offsetof(tracker_t, pCur));
dvander@157	1766	IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_TMP, MOD_MEM_REG);
dvander@157	1767	IA32_Sub_Rm_Reg_Disp8(jit, AMX_REG_INFO, AMX_REG_TMP, AMX_INFO_HEAP);
dvander@157	1768
dvander@157	1769	Write_CheckHeap_Min(jit);
dvander@157	1770
dvander@157	1771	/* Restore PRI & ALT */
dvander@157	1772	//pop edx
dvander@157	1773	//pop eax
dvander@157	1774	IA32_Pop_Reg(jit, AMX_REG_ALT);
dvander@157	1775	IA32_Pop_Reg(jit, AMX_REG_PRI);
dvander@157	1776	}
dvander@157	1777
faluco@201	1778	inline void WriteOp_Stradjust_Pri(JitWriter *jit)
faluco@201	1779	{
faluco@201	1780	//add eax, 4
faluco@201	1781	//sar eax, 2
faluco@201	1782	IA32_Add_Rm_Imm8(jit, AMX_REG_PRI, 4, MOD_REG);
faluco@201	1783	IA32_Sar_Rm_Imm8(jit, AMX_REG_PRI, 2, MOD_REG);
faluco@201	1784	}
faluco@201	1785
faluco@831	1786	inline void WriteOp_FloatAbs(JitWriter *jit)
faluco@831	1787	{
faluco@831	1788	//mov eax, [edi]
faluco@831	1789	//and eax, 0x7FFFFFFF
faluco@831	1790	IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_MEM_REG);
faluco@831	1791	IA32_And_Eax_Imm32(jit, 0x7FFFFFFF);
faluco@831	1792
faluco@831	1793	/* Rectify the stack */
faluco@831	1794	//add edi, 4
faluco@831	1795	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
faluco@831	1796	}
faluco@831	1797
faluco@831	1798	inline void WriteOp_Float(JitWriter *jit)
faluco@831	1799	{
faluco@831	1800	//fild [edi]
faluco@831	1801	//push eax
faluco@831	1802	//fstp [esp]
faluco@831	1803	//pop eax
faluco@831	1804	IA32_Fild_Mem32(jit, AMX_REG_STK);
faluco@831	1805	IA32_Push_Reg(jit, AMX_REG_PRI);
faluco@831	1806	IA32_Fstp_Mem32_ESP(jit);
faluco@831	1807	IA32_Pop_Reg(jit, AMX_REG_PRI);
faluco@831	1808
faluco@831	1809	/* Rectify the stack */
faluco@831	1810	//add edi, 4
faluco@831	1811	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
faluco@831	1812	}
faluco@831	1813
faluco@831	1814	inline void WriteOp_FloatAdd(JitWriter *jit)
faluco@831	1815	{
faluco@831	1816	//push eax
faluco@831	1817	//fld [edi]
faluco@831	1818	//fadd [edi+4]
faluco@831	1819	//fstp [esp]
faluco@831	1820	//pop eax
faluco@831	1821	IA32_Push_Reg(jit, AMX_REG_PRI);
faluco@831	1822	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	1823	IA32_Fadd_Mem32_Disp8(jit, AMX_REG_STK, 4);
faluco@831	1824	IA32_Fstp_Mem32_ESP(jit);
faluco@831	1825	IA32_Pop_Reg(jit, AMX_REG_PRI);
faluco@831	1826
faluco@831	1827	/* Rectify the stack */
faluco@831	1828	//add edi, 8
faluco@831	1829	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG);
faluco@831	1830	}
faluco@831	1831
faluco@831	1832	inline void WriteOp_FloatSub(JitWriter *jit)
faluco@831	1833	{
faluco@831	1834	//push eax
faluco@831	1835	//fld [edi]
faluco@831	1836	//fsub [edi+4]
faluco@831	1837	//fstp [esp]
faluco@831	1838	//pop eax
faluco@831	1839	IA32_Push_Reg(jit, AMX_REG_PRI);
faluco@831	1840	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	1841	IA32_Fsub_Mem32_Disp8(jit, AMX_REG_STK, 4);
faluco@831	1842	IA32_Fstp_Mem32_ESP(jit);
faluco@831	1843	IA32_Pop_Reg(jit, AMX_REG_PRI);
faluco@831	1844
faluco@831	1845	/* Rectify the stack */
faluco@831	1846	//add edi, 8
faluco@831	1847	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG);
faluco@831	1848	}
faluco@831	1849
faluco@831	1850	inline void WriteOp_FloatMul(JitWriter *jit)
faluco@831	1851	{
faluco@831	1852	//push eax
faluco@831	1853	//fld [edi]
faluco@831	1854	//fmul [edi+4]
faluco@831	1855	//fstp [esp]
faluco@831	1856	//pop eax
faluco@831	1857	IA32_Push_Reg(jit, AMX_REG_PRI);
faluco@831	1858	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	1859	IA32_Fmul_Mem32_Disp8(jit, AMX_REG_STK, 4);
faluco@831	1860	IA32_Fstp_Mem32_ESP(jit);
faluco@831	1861	IA32_Pop_Reg(jit, AMX_REG_PRI);
faluco@831	1862
faluco@831	1863	/* Rectify the stack */
faluco@831	1864	//add edi, 8
faluco@831	1865	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG);
faluco@831	1866	}
faluco@831	1867
faluco@831	1868	inline void WriteOp_FloatDiv(JitWriter *jit)
faluco@831	1869	{
faluco@831	1870	//push eax
faluco@831	1871	//fld [edi]
faluco@831	1872	//fdiv [edi+4]
faluco@831	1873	//fstp [esp]
faluco@831	1874	//pop eax
faluco@831	1875	IA32_Push_Reg(jit, AMX_REG_PRI);
faluco@831	1876	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	1877	IA32_Fdiv_Mem32_Disp8(jit, AMX_REG_STK, 4);
faluco@831	1878	IA32_Fstp_Mem32_ESP(jit);
faluco@831	1879	IA32_Pop_Reg(jit, AMX_REG_PRI);
faluco@831	1880
faluco@831	1881	/* Rectify the stack */
faluco@831	1882	//add edi, 8
faluco@831	1883	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG);
faluco@831	1884	}
faluco@831	1885
faluco@831	1886	inline void WriteOp_RountToNearest(JitWriter *jit)
faluco@831	1887	{
faluco@831	1888	//push eax
faluco@831	1889	//fld [edi]
faluco@831	1890
faluco@831	1891	//fstcw [esp]
faluco@831	1892	//mov eax, [esp]
faluco@831	1893	//push eax
faluco@831	1894
faluco@831	1895	//mov [esp+4], 0x3FF
faluco@831	1896	//fadd st(0), st(0)
faluco@831	1897	//fldcw [esp+4]
faluco@831	1898
faluco@831	1899	//push eax
faluco@831	1900	//push 0x3F000000 ; 0.5f
faluco@831	1901	//fadd [esp]
faluco@831	1902	//fistp [esp+4]
faluco@831	1903	//pop eax
faluco@831	1904	//pop eax
faluco@831	1905
faluco@831	1906	//pop ecx
faluco@831	1907	//sar eax, 1
faluco@831	1908	//mov [esp], ecx
faluco@831	1909	//fldcw [esp]
faluco@831	1910	//add esp, 4
faluco@831	1911
faluco@831	1912	IA32_Push_Reg(jit, REG_EAX);
faluco@831	1913	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	1914
faluco@831	1915	IA32_Fstcw_Mem16_ESP(jit);
faluco@831	1916	IA32_Mov_Reg_RmESP(jit, REG_EAX);
faluco@831	1917	IA32_Push_Reg(jit, REG_EAX);
faluco@831	1918
faluco@831	1919	IA32_Mov_ESP_Disp8_Imm32(jit, 4, 0x3FF);
faluco@831	1920	IA32_Fadd_FPUreg_ST0(jit, 0);
faluco@831	1921	IA32_Fldcw_Mem16_Disp8_ESP(jit, 4);
faluco@831	1922
faluco@831	1923	IA32_Push_Reg(jit, REG_EAX);
faluco@831	1924	IA32_Push_Imm32(jit, 0x3F000000);
faluco@831	1925	IA32_Fadd_Mem32_ESP(jit);
faluco@831	1926	IA32_Fistp_Mem32_Disp8_Esp(jit, 4);
faluco@831	1927	IA32_Pop_Reg(jit, REG_EAX);
faluco@831	1928	IA32_Pop_Reg(jit, AMX_REG_PRI);
faluco@831	1929
faluco@831	1930	IA32_Pop_Reg(jit, REG_ECX);
faluco@831	1931	IA32_Sar_Rm_1(jit, REG_EAX, MOD_REG);
faluco@831	1932	IA32_Mov_RmESP_Reg(jit, REG_ECX);
faluco@831	1933	IA32_Fldcw_Mem16_ESP(jit);
faluco@831	1934	IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG);
faluco@831	1935
faluco@831	1936	/* Rectify the stack */
faluco@831	1937	//add edi, 4
faluco@831	1938	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
faluco@831	1939	}
faluco@831	1940
faluco@831	1941	inline void WriteOp_RoundToFloor(JitWriter *jit)
faluco@831	1942	{
faluco@831	1943	//push eax
faluco@831	1944	//fld [edi]
faluco@831	1945
faluco@831	1946	//fstcw [esp]
faluco@831	1947	//mov eax, [esp]
faluco@831	1948	//push eax
faluco@831	1949
faluco@831	1950	//mov [esp+4], 0x7FF
faluco@831	1951	//fldcw [esp+4]
faluco@831	1952
faluco@831	1953	//push eax
faluco@831	1954	//fistp [esp]
faluco@831	1955	//pop eax
faluco@831	1956
faluco@831	1957	//pop ecx
faluco@831	1958	//mov [esp], ecx
faluco@831	1959	//fldcw [esp]
faluco@831	1960	//add esp, 4
faluco@831	1961
faluco@831	1962	IA32_Push_Reg(jit, REG_EAX);
faluco@831	1963	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	1964
faluco@831	1965	IA32_Fstcw_Mem16_ESP(jit);
faluco@831	1966	IA32_Mov_Reg_RmESP(jit, REG_EAX);
faluco@831	1967	IA32_Push_Reg(jit, REG_EAX);
faluco@831	1968
faluco@831	1969	IA32_Mov_ESP_Disp8_Imm32(jit, 4, 0x7FF);
faluco@831	1970	IA32_Fldcw_Mem16_Disp8_ESP(jit, 4);
faluco@831	1971
faluco@831	1972	IA32_Push_Reg(jit, REG_EAX);
faluco@831	1973	IA32_Fistp_Mem32_ESP(jit);
faluco@831	1974	IA32_Pop_Reg(jit, REG_EAX);
faluco@831	1975
faluco@831	1976	IA32_Pop_Reg(jit, REG_ECX);
faluco@831	1977	IA32_Mov_RmESP_Reg(jit, REG_ECX);
faluco@831	1978	IA32_Fldcw_Mem16_ESP(jit);
faluco@831	1979	IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG);
faluco@831	1980
faluco@831	1981	/* Rectify the stack */
faluco@831	1982	//add edi, 4
faluco@831	1983	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
faluco@831	1984	}
faluco@831	1985
faluco@831	1986	inline void WriteOp_RoundToCeil(JitWriter *jit)
faluco@831	1987	{
faluco@831	1988	//push eax
faluco@831	1989	//fld [edi]
faluco@831	1990
faluco@831	1991	//fstcw [esp]
faluco@831	1992	//mov eax, [esp]
faluco@831	1993	//push eax
faluco@831	1994
faluco@831	1995	//mov [esp+4], 0xBFF
faluco@831	1996	//fldcw [esp+4]
faluco@831	1997
faluco@831	1998	//push eax
faluco@831	1999	//fistp [esp]
faluco@831	2000	//pop eax
faluco@831	2001
faluco@831	2002	//pop ecx
faluco@831	2003	//mov [esp], ecx
faluco@831	2004	//fldcw [esp]
faluco@831	2005	//add esp, 4
faluco@831	2006
faluco@831	2007	IA32_Push_Reg(jit, REG_EAX);
faluco@831	2008	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	2009
faluco@831	2010	IA32_Fstcw_Mem16_ESP(jit);
faluco@831	2011	IA32_Mov_Reg_RmESP(jit, REG_EAX);
faluco@831	2012	IA32_Push_Reg(jit, REG_EAX);
faluco@831	2013
faluco@831	2014	IA32_Mov_ESP_Disp8_Imm32(jit, 4, 0xBFF);
faluco@831	2015	IA32_Fldcw_Mem16_Disp8_ESP(jit, 4);
faluco@831	2016
faluco@831	2017	IA32_Push_Reg(jit, REG_EAX);
faluco@831	2018	IA32_Fistp_Mem32_ESP(jit);
faluco@831	2019	IA32_Pop_Reg(jit, REG_EAX);
faluco@831	2020
faluco@831	2021	IA32_Pop_Reg(jit, REG_ECX);
faluco@831	2022	IA32_Mov_RmESP_Reg(jit, REG_ECX);
faluco@831	2023	IA32_Fldcw_Mem16_ESP(jit);
faluco@831	2024	IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG);
faluco@831	2025
faluco@831	2026	/* Rectify the stack */
faluco@831	2027	//add edi, 4
faluco@831	2028	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
faluco@831	2029	}
faluco@831	2030
faluco@831	2031	inline void WriteOp_RoundToZero(JitWriter *jit)
faluco@831	2032	{
faluco@831	2033	//push eax
faluco@831	2034	//fld [edi]
faluco@831	2035
faluco@831	2036	//fstcw [esp]
faluco@831	2037	//mov eax, [esp]
faluco@831	2038	//push eax
faluco@831	2039
faluco@831	2040	//mov [esp+4], 0xFFF
faluco@831	2041	//fldcw [esp+4]
faluco@831	2042
faluco@831	2043	//push eax
faluco@831	2044	//fistp [esp]
faluco@831	2045	//pop eax
faluco@831	2046
faluco@831	2047	//pop ecx
faluco@831	2048	//mov [esp], ecx
faluco@831	2049	//fldcw [esp]
faluco@831	2050	//add esp, 4
faluco@831	2051
faluco@831	2052	IA32_Push_Reg(jit, REG_EAX);
faluco@831	2053	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	2054
faluco@831	2055	IA32_Fstcw_Mem16_ESP(jit);
faluco@831	2056	IA32_Mov_Reg_RmESP(jit, REG_EAX);
faluco@831	2057	IA32_Push_Reg(jit, REG_EAX);
faluco@831	2058
faluco@831	2059	IA32_Mov_ESP_Disp8_Imm32(jit, 4, 0xFFF);
faluco@831	2060	IA32_Fldcw_Mem16_Disp8_ESP(jit, 4);
faluco@831	2061
faluco@831	2062	IA32_Push_Reg(jit, REG_EAX);
faluco@831	2063	IA32_Fistp_Mem32_ESP(jit);
faluco@831	2064	IA32_Pop_Reg(jit, REG_EAX);
faluco@831	2065
faluco@831	2066	IA32_Pop_Reg(jit, REG_ECX);
faluco@831	2067	IA32_Mov_RmESP_Reg(jit, REG_ECX);
faluco@831	2068	IA32_Fldcw_Mem16_ESP(jit);
faluco@831	2069	IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG);
faluco@831	2070
faluco@831	2071	/* Rectify the stack */
faluco@831	2072	//add edi, 4
faluco@831	2073	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
faluco@831	2074	}
faluco@831	2075
faluco@831	2076	inline void WriteOp_FloatCompare(JitWriter *jit)
faluco@831	2077	{
faluco@831	2078	CompData data = (CompData )jit->data;
faluco@831	2079
faluco@831	2080	//fld [edi]
faluco@831	2081	//fld [edi+4]
faluco@831	2082	//fucomip st(0), st(1)
faluco@831	2083	//mov ecx, <round_table>
faluco@831	2084	//cmovz eax, [ecx+4]
faluco@831	2085	//cmovb eax, [ecx+8]
faluco@831	2086	//cmova eax, [ecx]
faluco@831	2087	//fstp st(0)
faluco@831	2088
faluco@831	2089	IA32_Fld_Mem32(jit, AMX_REG_STK);
faluco@831	2090	IA32_Fld_Mem32_Disp8(jit, AMX_REG_STK, 4);
faluco@831	2091	IA32_Fucomip_ST0_FPUreg(jit, 1);
faluco@831	2092	IA32_Mov_Reg_Imm32(jit, AMX_REG_TMP, (jit_int32_t)jit->outbase + data->jit_rounding_table);
faluco@831	2093	IA32_CmovCC_Rm_Disp8(jit, AMX_REG_TMP, CC_Z, 4);
faluco@831	2094	IA32_CmovCC_Rm_Disp8(jit, AMX_REG_TMP, CC_B, 8);
faluco@831	2095	IA32_CmovCC_Rm(jit, AMX_REG_TMP, CC_A);
faluco@831	2096	IA32_Fstp_FPUreg(jit, 0);
faluco@831	2097
faluco@831	2098	/* Rectify the stack */
faluco@831	2099	//add edi, 8
faluco@831	2100	IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG);
faluco@831	2101	}
faluco@831	2102
dvander@157	2103	/*************************************************
dvander@157	2104	*************************************************
dvander@157	2105	* JIT PROPER ************************************
dvander@157	2106	* The rest from now on is the JIT engine *
dvander@157	2107	*************************************************
dvander@157	2108	*************************************************/
dvander@157	2109
dvander@157	2110	cell_t NativeCallback(sp_context_t ctx, ucell_t native_idx, cell_t params)
dvander@157	2111	{
dvander@157	2112	sp_native_t *native = &ctx->natives[native_idx];
dvander@237	2113
dvander@237	2114	ctx->n_idx = native_idx;
dvander@157	2115
dvander@157	2116	/* Technically both aren't needed, I guess */
dvander@164	2117	if (native->status == SP_NATIVE_UNBOUND)
dvander@157	2118	{
dvander@237	2119	ctx->n_err = SP_ERROR_INVALID_NATIVE;
dvander@157	2120	return 0;
dvander@157	2121	}
dvander@157	2122
faluco@225	2123	return native->pfn(ctx->context, params);
dvander@157	2124	}
dvander@157	2125
faluco@225	2126	static cell_t InvalidNative(IPluginContext pCtx, const cell_t params)
dvander@164	2127	{
faluco@225	2128	sp_context_t *ctx = pCtx->GetContext();
dvander@237	2129	ctx->n_err = SP_ERROR_INVALID_NATIVE;
dvander@164	2130
dvander@164	2131	return 0;
dvander@164	2132	}
dvander@164	2133
dvander@157	2134	cell_t NativeCallback_Debug(sp_context_t ctx, ucell_t native_idx, cell_t params)
dvander@157	2135	{
dvander@157	2136	cell_t save_sp = ctx->sp;
dvander@157	2137	cell_t save_hp = ctx->hp;
dvander@157	2138
dvander@237	2139	ctx->n_idx = native_idx;
dvander@237	2140
dvander@157	2141	if (ctx->hp < ctx->heap_base)
dvander@157	2142	{
dvander@237	2143	ctx->n_err = SP_ERROR_HEAPMIN;
dvander@157	2144	return 0;
dvander@157	2145	}
dvander@157	2146
dvander@157	2147	if (ctx->hp + STACK_MARGIN > ctx->sp)
dvander@157	2148	{
dvander@237	2149	ctx->n_err = SP_ERROR_STACKLOW;
dvander@157	2150	return 0;
dvander@157	2151	}
dvander@157	2152
dvander@157	2153	if ((uint32_t)ctx->sp >= ctx->mem_size)
dvander@157	2154	{
dvander@237	2155	ctx->n_err = SP_ERROR_STACKMIN;
dvander@157	2156	return 0;
dvander@157	2157	}
dvander@157	2158
dvander@157	2159	cell_t result = NativeCallback(ctx, native_idx, params);
dvander@157	2160
dvander@237	2161	if (ctx->n_err != SP_ERROR_NONE)
dvander@157	2162	{
dvander@157	2163	return result;
dvander@157	2164	}
dvander@157	2165
dvander@157	2166	if (save_sp != ctx->sp)
dvander@157	2167	{
dvander@237	2168	ctx->n_err = SP_ERROR_STACKLEAK;
dvander@157	2169	return result;
dvander@157	2170	} else if (save_hp != ctx->hp) {
dvander@237	2171	ctx->n_err = SP_ERROR_HEAPLEAK;
dvander@157	2172	return result;
dvander@157	2173	}
dvander@157	2174
dvander@157	2175	return result;
dvander@157	2176	}
dvander@157	2177
dvander@157	2178	jitoffs_t RelocLookup(JitWriter *jit, cell_t pcode_offs, bool relative)
dvander@157	2179	{
dvander@157	2180	if (jit->outptr)
dvander@157	2181	{
dvander@157	2182	CompData data = (CompData )jit->data;
dvander@157	2183	if (relative)
dvander@157	2184	{
dvander@157	2185	/* The actual offset is EIP relative. We need to relocate it.
dvander@157	2186	* Note that this assumes that we're pointing to the next op.
dvander@157	2187	*/
dvander@157	2188	pcode_offs += jit->get_inputpos();
dvander@157	2189	}
dvander@241	2190	/* Offset must always be 1)positive and 2)less than or equal to the codesize */
dvander@241	2191	assert(pcode_offs >= 0 && (uint32_t)pcode_offs <= data->codesize);
dvander@157	2192	/* Do the lookup in the native dictionary. */
dvander@157	2193	return (jitoffs_t )(data->rebase + pcode_offs);
dvander@157	2194	} else {
dvander@157	2195	return 0;
dvander@157	2196	}
dvander@157	2197	}
dvander@157	2198
dvander@157	2199	void WriteErrorRoutines(CompData data, JitWriter jit)
dvander@157	2200	{
faluco@853	2201	AlignMe(jit);
faluco@853	2202
dvander@157	2203	data->jit_error_divzero = jit->get_outputpos();
dvander@157	2204	Write_SetError(jit, SP_ERROR_DIVIDE_BY_ZERO);
dvander@157	2205
dvander@157	2206	data->jit_error_stacklow = jit->get_outputpos();
dvander@157	2207	Write_SetError(jit, SP_ERROR_STACKLOW);
dvander@157	2208
dvander@157	2209	data->jit_error_stackmin = jit->get_outputpos();
dvander@157	2210	Write_SetError(jit, SP_ERROR_STACKMIN);
dvander@157	2211
dvander@157	2212	data->jit_error_bounds = jit->get_outputpos();
dvander@157	2213	Write_SetError(jit, SP_ERROR_ARRAY_BOUNDS);
dvander@157	2214
dvander@157	2215	data->jit_error_memaccess = jit->get_outputpos();
dvander@157	2216	Write_SetError(jit, SP_ERROR_MEMACCESS);
dvander@157	2217
dvander@157	2218	data->jit_error_heaplow = jit->get_outputpos();
dvander@157	2219	Write_SetError(jit, SP_ERROR_HEAPLOW);
dvander@157	2220
dvander@157	2221	data->jit_error_heapmin = jit->get_outputpos();
dvander@157	2222	Write_SetError(jit, SP_ERROR_HEAPMIN);
dvander@157	2223
dvander@157	2224	data->jit_error_array_too_big = jit->get_outputpos();
dvander@157	2225	Write_SetError(jit, SP_ERROR_ARRAY_TOO_BIG);
dvander@157	2226
dvander@157	2227	data->jit_extern_error = jit->get_outputpos();
dvander@157	2228	Write_GetError(jit);
dvander@157	2229	}
dvander@157	2230
dvander@157	2231	sp_context_t JITX86::CompileToContext(ICompilation co, int *err)
dvander@157	2232	{
dvander@157	2233	CompData data = (CompData )co;
dvander@157	2234	sp_plugin_t *plugin = data->plugin;
dvander@157	2235
dvander@157	2236	/* The first phase is to browse */
dvander@157	2237	uint8_t *code = plugin->pcode;
dvander@157	2238	uint8_t *end_cip = plugin->pcode + plugin->pcode_size;
dvander@157	2239	OPCODE op;
dvander@157	2240
dvander@157	2241	/*********************************************
dvander@157	2242	* FIRST PASS (medium load): writer.outbase is NULL, getting size only
dvander@157	2243	* SECOND PASS (heavy load!!): writer.outbase is valid and output is written
dvander@157	2244	*********************************************/
dvander@157	2245
dvander@157	2246	JitWriter writer;
dvander@157	2247	JitWriter *jit = &writer;
dvander@157	2248	cell_t endptr = (cell_t )(end_cip);
dvander@175	2249	uint32_t codemem = 0;
dvander@157	2250
dvander@157	2251	/* Initial code is written "blank,"
dvander@157	2252	* so we can check the exact memory usage.
dvander@157	2253	*/
dvander@157	2254	data->codesize = plugin->pcode_size;
dvander@157	2255	writer.data = data;
dvander@157	2256	writer.inbase = (cell_t *)code;
dvander@157	2257	writer.outptr = NULL;
dvander@157	2258	writer.outbase = NULL;
dvander@241	2259	/* Allocate relocation. One extra cell for final CIP. */
dvander@241	2260	data->rebase = (jitcode_t)engine->BaseAlloc(plugin->pcode_size + sizeof(cell_t));
dvander@157	2261
dvander@157	2262	/* We will jump back here for second pass */
dvander@157	2263	jit_rewind:
dvander@157	2264	/* Initialize pass vars */
dvander@157	2265	writer.inptr = writer.inbase;
dvander@157	2266	data->jit_verify_addr_eax = 0;
dvander@157	2267	data->jit_verify_addr_edx = 0;
dvander@157	2268
dvander@157	2269	/* Write the prologue of the JIT */
dvander@157	2270	data->jit_return = Write_Execute_Function(jit);
dvander@157	2271
dvander@157	2272	/* Write the SYSREQ.N opcode if we need to */
dvander@157	2273	if (!(data->inline_level & JIT_INLINE_NATIVES))
dvander@157	2274	{
faluco@853	2275	AlignMe(jit);
dvander@157	2276	data->jit_sysreq_n = jit->get_outputpos();
dvander@157	2277	WriteOp_Sysreq_N_Function(jit);
dvander@157	2278	}
dvander@157	2279
dvander@241	2280	/* Write the debug section if we need it */
dvander@241	2281	if (data->debug == true)
dvander@241	2282	{
faluco@853	2283	AlignMe(jit);
dvander@241	2284	data->jit_break = jit->get_outputpos();
dvander@241	2285	Write_BreakDebug(jit);
dvander@241	2286	}
dvander@241	2287
dvander@157	2288	/* Plugins compiled with -O0 will need this! */
faluco@853	2289	AlignMe(jit);
dvander@157	2290	data->jit_sysreq_c = jit->get_outputpos();
dvander@157	2291	WriteOp_Sysreq_C_Function(jit);
dvander@157	2292
faluco@853	2293	AlignMe(jit);
dvander@157	2294	data->jit_genarray = jit->get_outputpos();
dvander@157	2295	WriteIntrinsic_GenArray(jit);
dvander@157	2296
dvander@157	2297	/* Write error checking routines that are called to */
dvander@157	2298	if (!(data->inline_level & JIT_INLINE_ERRORCHECKS))
dvander@157	2299	{
faluco@853	2300	AlignMe(jit);
dvander@157	2301	data->jit_verify_addr_eax = jit->get_outputpos();
dvander@157	2302	Write_Check_VerifyAddr(jit, REG_EAX);
dvander@157	2303
faluco@853	2304	AlignMe(jit);
dvander@157	2305	data->jit_verify_addr_edx = jit->get_outputpos();
dvander@157	2306	Write_Check_VerifyAddr(jit, REG_EDX);
dvander@157	2307	}
dvander@157	2308
faluco@831	2309	/* Write the rounding table for the float compare opcode */
faluco@831	2310	data->jit_rounding_table = jit->get_outputpos();
faluco@831	2311	Write_RoundingTable(jit);
faluco@831	2312
dvander@157	2313	/* Actual code generation! */
dvander@157	2314	if (writer.outbase == NULL)
dvander@157	2315	{
dvander@157	2316	/* First Pass - find codesize and resolve relocation */
dvander@157	2317	jitoffs_t pcode_offs;
dvander@157	2318	jitoffs_t native_offs;
dvander@157	2319
dvander@157	2320	for (; writer.inptr < endptr;)
dvander@157	2321	{
dvander@157	2322	/* Store the native offset into the rebase memory.
dvander@157	2323	* This large chunk of memory lets us do an instant lookup
dvander@157	2324	* based on an original pcode offset.
dvander@157	2325	*/
dvander@157	2326	pcode_offs = (jitoffs_t)((uint8_t *)writer.inptr - code);
dvander@157	2327	native_offs = jit->get_outputpos();
dvander@157	2328	((jitoffs_t )(data->rebase + pcode_offs)) = native_offs;
dvander@157	2329
dvander@157	2330	/* Now read the opcode and continue. */
dvander@157	2331	op = (OPCODE)writer.read_cell();
faluco@831	2332
faluco@831	2333	/* Patch the floating point natives with our opcodes */
faluco@831	2334	if (op == OP_SYSREQ_N)
faluco@831	2335	{
faluco@831	2336	cell_t idx = writer.read_cell();
faluco@831	2337	if (data->jit_float_table[idx].found)
faluco@831	2338	{
faluco@831	2339	writer.inptr -= 2;
faluco@831	2340	*(writer.inptr++) = data->jit_float_table[idx].index;
faluco@831	2341	*(writer.inptr++) = OP_NOP;
faluco@831	2342	*(writer.inptr++) = OP_NOP;
faluco@831	2343	op = (OPCODE)data->jit_float_table[idx].index;
faluco@831	2344	} else {
faluco@831	2345	writer.inptr--;
faluco@831	2346	}
faluco@831	2347	}
dvander@157	2348	switch (op)
dvander@157	2349	{
dvander@157	2350	#include "opcode_switch.inc"
dvander@157	2351	}
dvander@157	2352	/* Check for errors. This should only happen in the first pass. */
dvander@157	2353	if (data->error_set != SP_ERROR_NONE)
dvander@157	2354	{
dvander@157	2355	*err = data->error_set;
dvander@157	2356	AbortCompilation(co);
dvander@157	2357	return NULL;
dvander@157	2358	}
dvander@157	2359	}
dvander@157	2360	/* Write these last because error jumps should be unpredicted, and thus forward */
dvander@157	2361	WriteErrorRoutines(data, jit);
dvander@157	2362
dvander@241	2363	/* Write the final CIP to the last position in the reloc array */
dvander@241	2364	pcode_offs = (jitoffs_t)((uint8_t *)writer.inptr - code);
dvander@241	2365	native_offs = jit->get_outputpos();
dvander@241	2366	((jitoffs_t )(data->rebase + pcode_offs)) = native_offs;
dvander@241	2367
dvander@157	2368	/* the total codesize is now known! */
dvander@175	2369	codemem = writer.get_outputpos();
dvander@175	2370	writer.outbase = (jitcode_t)engine->ExecAlloc(codemem);
dvander@157	2371	writer.outptr = writer.outbase;
dvander@157	2372	/* go back for third pass */
dvander@157	2373	goto jit_rewind;
dvander@157	2374	} else {
dvander@157	2375	/*******
dvander@157	2376	* THIRD PASS - write opcode info
dvander@157	2377	*******/
dvander@157	2378	for (; writer.inptr < endptr;)
dvander@157	2379	{
dvander@157	2380	op = (OPCODE)writer.read_cell();
dvander@157	2381	switch (op)
dvander@157	2382	{
dvander@157	2383	#include "opcode_switch.inc"
dvander@157	2384	}
dvander@157	2385	}
dvander@157	2386	/* Write these last because error jumps should be unpredicted, and thus forward */
dvander@157	2387	WriteErrorRoutines(data, jit);
dvander@157	2388	}
dvander@157	2389
dvander@157	2390	/*************
dvander@157	2391	* FOURTH PASS - Context Setup
dvander@157	2392	*************/
dvander@157	2393
dvander@157	2394	sp_context_t *ctx = new sp_context_t;
dvander@157	2395	memset(ctx, 0, sizeof(sp_context_t));
dvander@157	2396
dvander@157	2397	/* setup basics */
dvander@157	2398	ctx->codebase = writer.outbase;
dvander@157	2399	ctx->plugin = plugin;
dvander@157	2400	ctx->vmbase = this;
dvander@157	2401	ctx->flags = (data->debug ? SPFLAG_PLUGIN_DEBUG : 0);
dvander@157	2402
dvander@157	2403	/* setup memory */
dvander@157	2404	ctx->memory = new uint8_t[plugin->memory];
dvander@157	2405	memcpy(ctx->memory, plugin->data, plugin->data_size);
dvander@157	2406	ctx->mem_size = plugin->memory;
dvander@157	2407	ctx->heap_base = plugin->data_size;
dvander@157	2408	ctx->hp = ctx->heap_base;
dvander@157	2409	ctx->sp = ctx->mem_size - sizeof(cell_t);
dvander@157	2410
dvander@157	2411	const char *strbase = plugin->info.stringbase;
dvander@157	2412	uint32_t max, iter;
dvander@157	2413
dvander@157	2414	/* relocate public info */
dvander@157	2415	if ((max = plugin->info.publics_num))
dvander@157	2416	{
dvander@157	2417	ctx->publics = new sp_public_t[max];
dvander@157	2418	for (iter=0; iter<max; iter++)
dvander@157	2419	{
dvander@157	2420	ctx->publics[iter].name = strbase + plugin->info.publics[iter].name;
dvander@164	2421	ctx->publics[iter].code_offs = RelocLookup(jit, plugin->info.publics[iter].address, false);
dvander@164	2422	/* Encode the ID as a straight code offset */
dvander@164	2423	ctx->publics[iter].funcid = (ctx->publics[iter].code_offs << 1);
dvander@157	2424	}
dvander@157	2425	}
dvander@157	2426
dvander@157	2427	/* relocate pubvar info */
dvander@157	2428	if ((max = plugin->info.pubvars_num))
dvander@157	2429	{
dvander@157	2430	uint8_t *dat = ctx->memory;
dvander@157	2431	ctx->pubvars = new sp_pubvar_t[max];
dvander@157	2432	for (iter=0; iter<max; iter++)
dvander@157	2433	{
dvander@157	2434	ctx->pubvars[iter].name = strbase + plugin->info.pubvars[iter].name;
dvander@157	2435	ctx->pubvars[iter].offs = (cell_t *)(dat + plugin->info.pubvars[iter].address);
dvander@157	2436	}
dvander@157	2437	}
dvander@157	2438
dvander@157	2439	/* relocate native info */
dvander@157	2440	if ((max = plugin->info.natives_num))
dvander@157	2441	{
dvander@157	2442	ctx->natives = new sp_native_t[max];
dvander@157	2443	for (iter=0; iter<max; iter++)
dvander@157	2444	{
dvander@157	2445	ctx->natives[iter].name = strbase + plugin->info.natives[iter].name;
dvander@164	2446	ctx->natives[iter].pfn = &InvalidNative;
dvander@164	2447	ctx->natives[iter].status = SP_NATIVE_UNBOUND;
faluco@1089	2448	ctx->natives[iter].flags = 0;
dvander@157	2449	}
dvander@157	2450	}
dvander@157	2451
dvander@157	2452	/**
dvander@157	2453	* If we're debugging, make sure we copy the necessary info.
dvander@157	2454	*/
dvander@157	2455	if (data->debug)
dvander@157	2456	{
dvander@157	2457	strbase = plugin->debug.stringbase;
dvander@157	2458
dvander@157	2459	/* relocate files */
dvander@157	2460	max = plugin->debug.files_num;
dvander@157	2461	ctx->files = new sp_debug_file_t[max];
dvander@157	2462	for (iter=0; iter<max; iter++)
dvander@157	2463	{
dvander@157	2464	ctx->files[iter].addr = RelocLookup(jit, plugin->debug.files[iter].addr, false);
dvander@157	2465	ctx->files[iter].name = strbase + plugin->debug.files[iter].name;
dvander@157	2466	}
dvander@157	2467
dvander@157	2468	/* relocate lines */
dvander@157	2469	max = plugin->debug.lines_num;
dvander@157	2470	ctx->lines = new sp_debug_line_t[max];
dvander@157	2471	for (iter=0; iter<max; iter++)
dvander@157	2472	{
dvander@157	2473	ctx->lines[iter].addr = RelocLookup(jit, plugin->debug.lines[iter].addr, false);
dvander@157	2474	ctx->lines[iter].line = plugin->debug.lines[iter].line;
dvander@157	2475	}
dvander@157	2476
dvander@157	2477	/* relocate arrays */
dvander@157	2478	sp_fdbg_symbol_t *sym;
dvander@157	2479	sp_fdbg_arraydim_t *arr;
dvander@157	2480	uint8_t cursor = (uint8_t )(plugin->debug.symbols);
dvander@157	2481
dvander@157	2482	max = plugin->debug.syms_num;
dvander@157	2483	ctx->symbols = new sp_debug_symbol_t[max];
dvander@157	2484	for (iter=0; iter<max; iter++)
dvander@157	2485	{
dvander@157	2486	sym = (sp_fdbg_symbol_t *)cursor;
dvander@157	2487
dvander@253	2488	/**
dvander@253	2489	* @brief There is an "issue" where the compiler will give totally bogus code
dvander@253	2490	* address because codegeneration is still being calculated. A simple fix for
dvander@253	2491	* this is to coerce the codestart value to 0 when it's invalid.
dvander@253	2492	*/
dvander@253	2493	if (sym->codestart > data->codesize)
dvander@253	2494	{
dvander@253	2495	ctx->symbols[iter].codestart = 0;
dvander@253	2496	} else {
dvander@253	2497	ctx->symbols[iter].codestart = RelocLookup(jit, sym->codestart, false);
dvander@253	2498	}
dvander@253	2499	if (sym->codeend > data->codesize)
dvander@253	2500	{
dvander@253	2501	ctx->symbols[iter].codeend = data->codesize;
dvander@253	2502	} else {
dvander@253	2503	ctx->symbols[iter].codeend = RelocLookup(jit, sym->codeend, false);
dvander@253	2504	}
dvander@157	2505	ctx->symbols[iter].name = strbase + sym->name;
dvander@157	2506	ctx->symbols[iter].sym = sym;
dvander@157	2507
dvander@157	2508	if (sym->dimcount > 0)
dvander@157	2509	{
dvander@157	2510	cursor += sizeof(sp_fdbg_symbol_t);
dvander@157	2511	arr = (sp_fdbg_arraydim_t *)cursor;
dvander@157	2512	ctx->symbols[iter].dims = arr;
dvander@157	2513	cursor += sizeof(sp_fdbg_arraydim_t) * sym->dimcount;
dvander@157	2514	continue;
dvander@157	2515	}
dvander@157	2516
dvander@157	2517	ctx->symbols[iter].dims = NULL;
dvander@157	2518	cursor += sizeof(sp_fdbg_symbol_t);
dvander@157	2519	}
dvander@157	2520	}
dvander@157	2521
dvander@157	2522	tracker_t *trk = new tracker_t;
dvander@157	2523	ctx->vm[JITVARS_TRACKER] = trk;
dvander@157	2524	trk->pBase = (ucell_t *)malloc(1024);
dvander@157	2525	trk->pCur = trk->pBase;
dvander@157	2526	trk->size = 1024 / sizeof(cell_t);
dvander@157	2527
dvander@175	2528	functracker_t *fnc = new functracker_t;
dvander@175	2529	ctx->vm[JITVARS_FUNCINFO] = fnc;
dvander@344	2530	ctx->vm[JITVARS_REBASE] = data->rebase;
dvander@175	2531	fnc->code_size = codemem;
dvander@175	2532	fnc->num_functions = data->func_idx;
dvander@175	2533
dvander@157	2534	/* clean up relocation+compilation memory */
dvander@344	2535	data->rebase = NULL;
dvander@157	2536	AbortCompilation(co);
dvander@157	2537
dvander@157	2538	*err = SP_ERROR_NONE;
dvander@157	2539
dvander@157	2540	return ctx;
dvander@157	2541	}
dvander@157	2542
dvander@601	2543	SPVM_NATIVE_FUNC JITX86::CreateFakeNative(SPVM_FAKENATIVE_FUNC callback, void *pData)
dvander@601	2544	{
dvander@601	2545	JitWriter jw;
dvander@601	2546	JitWriter *jit = &jw;
dvander@601	2547
dvander@601	2548	jw.outbase = NULL;
dvander@601	2549	jw.outptr = NULL;
dvander@601	2550	jw.data = NULL;
dvander@601	2551
dvander@601	2552	/* First pass, calculate size */
dvander@601	2553	rewind:
dvander@601	2554	//push pData ;push pData
dvander@601	2555	//push [esp+12] ;push params
dvander@601	2556	//push [esp+12] ;push ctx
dvander@601	2557	//call [callback] ;invoke the meta-callback
dvander@601	2558	//add esp, 12 ;restore the stack
dvander@601	2559	//ret ;return
dvander@601	2560	IA32_Push_Imm32(jit, (jit_int32_t)pData);
dvander@601	2561	IA32_Push_Rm_Disp8_ESP(jit, 12);
dvander@601	2562	IA32_Push_Rm_Disp8_ESP(jit, 12);
dvander@601	2563	uint32_t call = IA32_Call_Imm32(jit, 0);
dvander@601	2564	IA32_Write_Jump32_Abs(jit, call, (void *)callback);
dvander@601	2565	IA32_Add_Rm_Imm8(jit, REG_ESP, 12, MOD_REG);
dvander@601	2566	IA32_Return(jit);
dvander@601	2567
dvander@601	2568	if (jw.outbase == NULL)
dvander@601	2569	{
dvander@601	2570	/* Second pass: Actually write */
dvander@601	2571	jw.outbase = (jitcode_t)engine->ExecAlloc(jw.get_outputpos());
dvander@601	2572	if (!jw.outbase)
dvander@601	2573	{
dvander@601	2574	return NULL;
dvander@601	2575	}
dvander@601	2576	jw.outptr = jw.outbase;
dvander@601	2577
dvander@601	2578	goto rewind;
dvander@601	2579	}
dvander@601	2580
dvander@601	2581	return (SPVM_NATIVE_FUNC)jw.outbase;
dvander@601	2582	}
dvander@601	2583
dvander@605	2584	void JITX86::DestroyFakeNative(SPVM_NATIVE_FUNC func)
dvander@601	2585	{
dvander@602	2586	engine->ExecFree((void *)func);
dvander@601	2587	}
dvander@601	2588
dvander@157	2589	const char *JITX86::GetVMName()
dvander@157	2590	{
dvander@157	2591	return "JIT (x86)";
dvander@157	2592	}
dvander@157	2593
dvander@157	2594	int JITX86::ContextExecute(sp_context_t ctx, uint32_t code_idx, cell_t result)
dvander@157	2595	{
dvander@157	2596	typedef int (CONTEXT_EXECUTE)(sp_context_t , uint32_t, cell_t *);
dvander@157	2597	CONTEXT_EXECUTE fn = (CONTEXT_EXECUTE)ctx->codebase;
dvander@157	2598	return fn(ctx, code_idx, result);
dvander@157	2599	}
dvander@157	2600
dvander@157	2601	void JITX86::FreeContext(sp_context_t *ctx)
dvander@157	2602	{
dvander@157	2603	engine->ExecFree(ctx->codebase);
dvander@157	2604	delete [] ctx->memory;
dvander@157	2605	delete [] ctx->files;
dvander@157	2606	delete [] ctx->lines;
dvander@157	2607	delete [] ctx->natives;
dvander@157	2608	delete [] ctx->publics;
dvander@157	2609	delete [] ctx->pubvars;
dvander@157	2610	delete [] ctx->symbols;
dvander@344	2611	engine->BaseFree(ctx->vm[JITVARS_REBASE]);
dvander@157	2612	free(((tracker_t *)(ctx->vm[JITVARS_TRACKER]))->pBase);
faluco@641	2613	delete (tracker_t *)ctx->vm[JITVARS_TRACKER];
faluco@641	2614	delete (functracker_t *)ctx->vm[JITVARS_FUNCINFO];
dvander@157	2615	delete ctx;
dvander@157	2616	}
dvander@157	2617
dvander@157	2618	ICompilation JITX86::StartCompilation(sp_plugin_t plugin)
dvander@157	2619	{
dvander@157	2620	CompData *data = new CompData;
faluco@831	2621	uint32_t max_natives = plugin->info.natives_num;
faluco@831	2622	const char *strbase = plugin->info.stringbase;
dvander@157	2623
dvander@157	2624	data->plugin = plugin;
dvander@157	2625	data->inline_level = JIT_INLINE_ERRORCHECKS\|JIT_INLINE_NATIVES;
dvander@157	2626	data->error_set = SP_ERROR_NONE;
dvander@157	2627
faluco@831	2628	data->jit_float_table = new floattbl_t[max_natives];
faluco@831	2629	for (uint32_t i=0; i<max_natives; i++)
faluco@831	2630	{
faluco@831	2631	const char *name = strbase + plugin->info.natives[i].name;
faluco@831	2632	if (!strcmp(name, "FloatAbs"))
faluco@831	2633	{
faluco@831	2634	data->jit_float_table[i].found = true;
faluco@831	2635	data->jit_float_table[i].index = OP_FABS;
faluco@831	2636	} else if (!strcmp(name, "FloatAdd")) {
faluco@831	2637	data->jit_float_table[i].found = true;
faluco@831	2638	data->jit_float_table[i].index = OP_FLOATADD;
faluco@831	2639	} else if (!strcmp(name, "FloatSub")) {
faluco@831	2640	data->jit_float_table[i].found = true;
faluco@831	2641	data->jit_float_table[i].index = OP_FLOATSUB;
faluco@831	2642	} else if (!strcmp(name, "FloatMul")) {
faluco@831	2643	data->jit_float_table[i].found = true;
faluco@831	2644	data->jit_float_table[i].index = OP_FLOATMUL;
faluco@831	2645	} else if (!strcmp(name, "FloatDiv")) {
faluco@831	2646	data->jit_float_table[i].found = true;
faluco@831	2647	data->jit_float_table[i].index = OP_FLOATDIV;
faluco@831	2648	} else if (!strcmp(name, "float")) {
faluco@831	2649	data->jit_float_table[i].found = true;
faluco@831	2650	data->jit_float_table[i].index = OP_FLOAT;
faluco@831	2651	} else if (!strcmp(name, "FloatCompare")) {
faluco@831	2652	data->jit_float_table[i].found = true;
faluco@831	2653	data->jit_float_table[i].index = OP_FLOATCMP;
faluco@831	2654	} else if (!strcmp(name, "RoundToZero")) {
faluco@831	2655	data->jit_float_table[i].found = true;
faluco@831	2656	data->jit_float_table[i].index = OP_RND_TO_ZERO;
faluco@831	2657	} else if (!strcmp(name, "RoundToCeil")) {
faluco@831	2658	data->jit_float_table[i].found = true;
faluco@831	2659	data->jit_float_table[i].index = OP_RND_TO_CEIL;
faluco@831	2660	} else if (!strcmp(name, "RoundToFloor")) {
faluco@831	2661	data->jit_float_table[i].found = true;
faluco@831	2662	data->jit_float_table[i].index = OP_RND_TO_FLOOR;
faluco@853	2663	} else if (!strcmp(name, "RoundToNearest")) {
faluco@831	2664	data->jit_float_table[i].found = true;
faluco@831	2665	data->jit_float_table[i].index = OP_RND_TO_NEAREST;
faluco@831	2666	}
faluco@831	2667	}
faluco@831	2668
dvander@157	2669	return data;
dvander@157	2670	}
dvander@157	2671
dvander@157	2672	void JITX86::AbortCompilation(ICompilation *co)
dvander@157	2673	{
dvander@157	2674	if (((CompData *)co)->rebase)
dvander@157	2675	{
dvander@157	2676	engine->BaseFree(((CompData *)co)->rebase);
dvander@157	2677	}
faluco@831	2678	delete [] ((CompData *)co)->jit_float_table;
dvander@157	2679	delete (CompData *)co;
dvander@157	2680	}
dvander@157	2681
dvander@157	2682	bool JITX86::SetCompilationOption(ICompilation co, const char key, const char *val)
dvander@157	2683	{
dvander@157	2684	CompData data = (CompData )co;
dvander@157	2685
dvander@157	2686	if (strcmp(key, "debug") == 0)
dvander@157	2687	{
dvander@241	2688	if ((atoi(val) == 1) \|\| !strcmp(val, "yes"))
dvander@241	2689	{
dvander@241	2690	data->debug = true;
dvander@241	2691	} else {
dvander@241	2692	data->debug = false;
dvander@241	2693	}
dvander@157	2694	if (data->debug && !(data->plugin->flags & SP_FLAG_DEBUG))
dvander@157	2695	{
dvander@157	2696	data->debug = false;
dvander@157	2697	return false;
dvander@157	2698	}
dvander@157	2699	return true;
dvander@157	2700	}
dvander@157	2701
dvander@157	2702	return false;
dvander@157	2703	}
dvander@175	2704
dvander@175	2705	unsigned int JITX86::GetAPIVersion()
dvander@175	2706	{
dvander@175	2707	return SOURCEPAWN_VM_API_VERSION;
dvander@175	2708	}
dvander@175	2709
dvander@344	2710	bool JITX86::FunctionPLookup(const sp_context_t ctx, uint32_t code_addr, unsigned int result)
dvander@175	2711	{
dvander@344	2712	uint8_t rebase = (uint8_t )ctx->vm[JITVARS_REBASE];
dvander@344	2713
dvander@344	2714	/* Is this within the pcode bounds? */
dvander@344	2715	if (code_addr >= ctx->plugin->pcode_size - sizeof(uint32_t))
dvander@344	2716	{
dvander@344	2717	return false;
dvander@344	2718	}
dvander@344	2719
dvander@344	2720	/* Relocate this */
dvander@344	2721	code_addr = (jitoffs_t )(rebase + code_addr);
dvander@344	2722
dvander@344	2723	/* Check if this is in the relocation bounds */
dvander@175	2724	functracker_t fnc = (functracker_t )ctx->vm[JITVARS_FUNCINFO];
dvander@175	2725	if (code_addr >= fnc->code_size)
dvander@175	2726	{
dvander@175	2727	return false;
dvander@175	2728	}
dvander@175	2729
dvander@344	2730	/* Get the function info and sanity check */
dvander@344	2731	funcinfo_t f = (funcinfo_t )((char *)ctx->codebase + code_addr - sizeof(funcinfo_t));
dvander@344	2732	if (f->magic != JIT_FUNCMAGIC \|\| f->index >= fnc->num_functions)
dvander@344	2733	{
dvander@344	2734	return false;
dvander@344	2735	}
dvander@344	2736
dvander@344	2737	if (result)
dvander@344	2738	{
dvander@344	2739	*result = f->index;
dvander@344	2740	}
dvander@344	2741
dvander@344	2742	return true;
dvander@344	2743	}
dvander@344	2744
dvander@344	2745	bool JITX86::FunctionLookup(const sp_context_t ctx, uint32_t code_addr, unsigned int result)
dvander@344	2746	{
dvander@344	2747	/* Check if this is in the relocation bounds */
dvander@344	2748	functracker_t fnc = (functracker_t )ctx->vm[JITVARS_FUNCINFO];
dvander@344	2749	if (code_addr >= fnc->code_size)
dvander@344	2750	{
dvander@344	2751	return false;
dvander@344	2752	}
dvander@344	2753
dvander@344	2754	/* Get the function info and sanity check */
dvander@175	2755	funcinfo_t f = (funcinfo_t )((char *)ctx->codebase + code_addr - sizeof(funcinfo_t));
dvander@175	2756	if (f->magic != JIT_FUNCMAGIC \|\| f->index >= fnc->num_functions)
dvander@175	2757	{
dvander@175	2758	return false;
dvander@175	2759	}
dvander@175	2760
dvander@175	2761	if (result)
dvander@175	2762	{
dvander@175	2763	*result = f->index;
dvander@175	2764	}
dvander@175	2765
dvander@175	2766	return true;
dvander@175	2767	}
dvander@175	2768
dvander@175	2769	unsigned int JITX86::FunctionCount(const sp_context_t *ctx)
dvander@175	2770	{
dvander@175	2771	functracker_t fnc = (functracker_t )ctx->vm[JITVARS_FUNCINFO];
dvander@175	2772
dvander@175	2773	return fnc->num_functions;
dvander@175	2774	}
dvander@253	2775
dvander@253	2776	const char *JITX86::GetVersionString()
dvander@253	2777	{
dvander@566	2778	return SVN_FULL_VERSION;
dvander@253	2779	}
dvander@253	2780
dvander@253	2781	const char *JITX86::GetCPUOptimizations()
dvander@253	2782	{
faluco@853	2783	return "Generic i686";
dvander@253	2784	}

author	Scott Ehlert <ds@alliedmods.net>
	Sun Jul 15 08:00:26 2007 +0000 (2007-07-15)
changeset 1116	40cc5e9f0f1b
parent 1089	275107f9ca95
child 1166	a0aca246b033
permissions	-rw-r--r--