1.1 --- a/sourcepawn/vm/jit/x86/opcode_helpers.cpp Thu Sep 28 15:11:41 2006 +0000
1.2 +++ b/sourcepawn/vm/jit/x86/opcode_helpers.cpp Thu Sep 28 19:33:58 2006 +0000
1.3 @@ -20,6 +20,7 @@
1.4 * This is because we do not support resuming or sleeping!
1.5 */
1.6
1.7 + //:TODO: FIX THIS FOR THE EBP AND EDI SWITCHING
1.8 //push ebp
1.9 //mov ebp, esp
1.10 IA32_Push_Reg(jit, REG_EBP);
1.11 @@ -141,7 +142,7 @@
1.12 //jnz :nocall
1.13 IA32_Push_Reg(jit, AMX_REG_TMP);
1.14 IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_CONTEXT);
1.15 - IA32_Cmp_Rm_Imm32_Disp8(jit, AMX_REG_TMP, offsetof(sp_context_t, dbreak), 0);
1.16 + IA32_Cmp_Rm_Disp8_Imm8(jit, AMX_REG_TMP, offsetof(sp_context_t, dbreak), 0);
1.17 jitoffs_t jmp = IA32_Jump_Cond_Imm8(jit, CC_NZ, 0);
1.18
1.19 //pushad
1.20 @@ -153,7 +154,7 @@
1.21 //call ecx
1.22 //add esp, 8
1.23 //popad
1.24 - IA32_Push_Rm_Disp8(jit, AMX_REG_INFO, AMX_INFO_FRAME);
1.25 + IA32_Push_Rm_Disp8(jit, AMX_REG_INFO, AMX_INFO_FRAME); //:TODO: move to regs and push? and dont disp for 0
1.26 IA32_Push_Rm_Disp8(jit, AMX_REG_TMP, offsetof(sp_context_t, context));
1.27 IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_TMP, offsetof(sp_context_t, dbreak));
1.28 IA32_Call_Reg(jit, AMX_REG_TMP);
1.29 @@ -180,14 +181,12 @@
1.30
1.31 void Write_Check_DivZero(JitWriter *jit, jit_uint8_t reg)
1.32 {
1.33 - CompData *data = (CompData *)jit->data;
1.34 -
1.35 //test reg, reg
1.36 //jnz :continue
1.37 //divzero: (write error)
1.38 IA32_Test_Rm_Reg(jit, reg, reg, MOD_REG);
1.39 jitoffs_t jmp = IA32_Jump_Cond_Imm8(jit, CC_NZ, 0);
1.40 - if (!(data->inline_level & JIT_INLINE_ERRORCHECKS))
1.41 + if (!(((CompData *)jit->data)->inline_level & JIT_INLINE_ERRORCHECKS))
1.42 {
1.43 //sub esp, 4 - correct stack for returning to non-inlined JIT
1.44 IA32_Sub_Rm_Imm8(jit, REG_ESP, 4, MOD_REG);
1.45 @@ -197,7 +196,7 @@
1.46 IA32_Send_Jump8_Here(jit, jmp);
1.47
1.48 }
1.49 -
1.50 +//:TODO: FIX THIS FOR NEW EBP STUFF
1.51 void Write_Check_VerifyAddr(JitWriter *jit, jit_uint8_t reg, bool firstcall)
1.52 {
1.53 CompData *data = (CompData *)jit->data;
1.54 @@ -283,10 +282,10 @@
1.55 //cmp eax, ecx
1.56 //jg :err_bounds
1.57 //ret
1.58 - IA32_Cmp_Rm_Imm32(jit, MOD_REG, AMX_REG_PRI, 0);//:TODO: use imm8
1.59 + IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_PRI, 0);
1.60 jitoffs_t jmp1 = IA32_Jump_Cond_Imm8(jit, CC_L, 0);
1.61 //:TODO: make sure this is right order
1.62 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_TMP, MOD_REG);
1.63 + IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_TMP, MOD_REG);
1.64 jitoffs_t jmp2 = IA32_Jump_Cond_Imm8(jit, CC_G, 0);
1.65 IA32_Return(jit);
1.66 IA32_Send_Jump8_Here(jit, jmp1);
1.67 @@ -296,11 +295,15 @@
1.68 } else {
1.69 //cmp eax, 0
1.70 //jl :err_bounds
1.71 - IA32_Cmp_Rm_Imm32(jit, MOD_REG, AMX_REG_PRI, 0);//:TODO: use imm8
1.72 + IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_PRI, 0);
1.73 jitoffs_t jmp1 = IA32_Jump_Cond_Imm8(jit, CC_L, 0);
1.74 //cmp eax, <val>
1.75 //jg :err_bounds
1.76 - IA32_Cmp_Rm_Imm32(jit, MOD_REG, AMX_REG_PRI, jit->read_cell());//:TODO:check val size and use cmp eax or imm8
1.77 + cell_t val = jit->read_cell();
1.78 + if (val < SCHAR_MAX && val > SCHAR_MIN)
1.79 + IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_PRI, (jit_int8_t)val);
1.80 + else
1.81 + IA32_Cmp_Eax_Imm32(jit, val);
1.82 jitoffs_t jmp2 = IA32_Jump_Cond_Imm8(jit, CC_G, 0);
1.83 //jmp :continue
1.84 jitoffs_t cont = IA32_Jump_Imm8(jit, 0);
1.85 @@ -331,13 +334,13 @@
1.86 IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_HEAP);
1.87 IA32_Cmp_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_HEAPLOW);
1.88 jitoffs_t hm = IA32_Jump_Cond_Imm8(jit, CC_L, 0);
1.89 - //lea ecx, [edi+ecx+STACK_MARGIN]
1.90 - //cmp ecx, ebp
1.91 + //lea ecx, [ebp+ecx+STACK_MARGIN]
1.92 + //cmp ecx, edi
1.93 // jg :error_heaplow
1.94 //OR
1.95 // ret
1.96 IA32_Lea_Reg_DispRegMultImm8(jit, AMX_REG_TMP, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, STACK_MARGIN);
1.97 - IA32_Cmp_Rm_Reg(jit, REG_ECX, AMX_REG_STK, MOD_REG);
1.98 + IA32_Cmp_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_REG);
1.99 jitoffs_t hl = IA32_Jump_Cond_Imm8(jit, CC_G, 0);
1.100 jitoffs_t cont;
1.101 if (always_inline)
1.102 @@ -364,7 +367,7 @@
1.103 {
1.104 /* this is small, so we always inline it.
1.105 */
1.106 - //cmp ebp, [esi+stp]
1.107 + //cmp edi, [esi+stp]
1.108 //jle :continue
1.109 IA32_Cmp_Reg_Rm_Disp8(jit, AMX_REG_STK, AMX_REG_INFO, AMX_INFO_STACKTOP);
1.110 jitoffs_t jmp = IA32_Jump_Cond_Imm8(jit, CC_LE, 0);
1.111 @@ -381,17 +384,17 @@
1.112 void Macro_PushN_Addr(JitWriter *jit, int i)
1.113 {
1.114 //push eax
1.115 - //mov eax, frm
1.116 + //mov eax, [esi+frm]
1.117 //loop i times:
1.118 // lea ecx, [eax+<val>]
1.119 - // mov [ebp-4*i], ecx
1.120 - //sub ebp, 4*N
1.121 + // mov [edi-4*i], ecx
1.122 + //sub edi, 4*N
1.123 //pop eax
1.124
1.125 cell_t val;
1.126 int n = 1;
1.127 IA32_Push_Reg(jit, AMX_REG_PRI);
1.128 - IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_INFO_FRM, MOD_MEM_REG);
1.129 + IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_INFO, MOD_MEM_REG);
1.130 do
1.131 {
1.132 val = jit->read_cell();
1.133 @@ -409,8 +412,8 @@
1.134 {
1.135 //loop i times:
1.136 // mov ecx, [ebx+<val>]
1.137 - // mov [ebp-4*i], ecx
1.138 - //sub ebp, 4*N
1.139 + // mov [edi-4*i], ecx
1.140 + //sub edi, 4*N
1.141
1.142 cell_t val;
1.143 int n = 1;
1.144 @@ -429,8 +432,8 @@
1.145 void Macro_PushN_C(JitWriter *jit, int i)
1.146 {
1.147 //loop i times:
1.148 - // mov [ebp-4*i], <val>
1.149 - //sub ebp, 4*N
1.150 + // mov [edi-4*i], <val>
1.151 + //sub edi, 4*N
1.152
1.153 int n = 1;
1.154 do
1.155 @@ -443,9 +446,9 @@
1.156 void Macro_PushN(JitWriter *jit, int i)
1.157 {
1.158 //loop i times:
1.159 - // mov ecx, [edi+<val>]
1.160 - // mov [ebp-4*i], ecx
1.161 - //sub ebp, 4*N
1.162 + // mov ecx, [ebp+<val>]
1.163 + // mov [edi-4*i], ecx
1.164 + //sub edi, 4*N
1.165
1.166 cell_t val;
1.167 int n = 1;
