ds@1952: /** ds@1952: * vim: set ts=4 : ds@1952: * ============================================================================= dvander@2114: * SourceMod dvander@2114: * Copyright (C) 2004-2008 AlliedModders LLC. All rights reserved. ds@1952: * ============================================================================= ds@1952: * dvander@2114: * This program is free software; you can redistribute it and/or modify it under dvander@2114: * the terms of the GNU General Public License, version 3.0, as published by the dvander@2114: * Free Software Foundation. dvander@2114: * dvander@2114: * This program is distributed in the hope that it will be useful, but WITHOUT dvander@2114: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS dvander@2114: * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more dvander@2114: * details. dvander@2114: * dvander@2114: * You should have received a copy of the GNU General Public License along with dvander@2114: * this program. If not, see . dvander@2114: * dvander@2114: * As a special exception, AlliedModders LLC gives you permission to link the dvander@2114: * code of this program (as well as its derivative works) to "Half-Life 2," the dvander@2114: * "Source Engine," the "SourcePawn JIT," and any Game MODs that run on software dvander@2114: * by the Valve Corporation. You must obey the GNU General Public License in dvander@2114: * all respects for all other code used. Additionally, AlliedModders LLC grants dvander@2114: * this exception to all derivative works. AlliedModders LLC defines further dvander@2114: * exceptions, found in LICENSE.txt (as of this writing, version JULY-31-2007), dvander@2114: * or . ds@1952: * ds@1952: * Version: $Id$ ds@1952: */ ds@1952: ds@1952: #include ds@1952: #include ds@1952: #include ds@1952: #include "jit_x86.h" ds@1952: #include "opcode_helpers.h" ds@1952: #include dvander@2193: #include "../jit_version.h" dvander@2193: #include "../sp_vm_engine.h" dvander@2193: #include "../engine2.h" dvander@2193: #include "../BaseRuntime.h" dvander@2193: #include "../sp_vm_basecontext.h" ds@1952: ds@1952: #if defined USE_UNGEN_OPCODES ds@1952: #include "ungen_opcodes.h" ds@1952: #endif ds@1952: dvander@2193: JITX86 g_Jit1; dvander@2193: ISourcePawnEngine *engine = &g_engine1; dvander@2193: dvander@2193: inline sp_plugin_t *GETPLUGIN(sp_context_t *ctx) dvander@2193: { dvander@2193: return (sp_plugin_t *)(ctx->vm[JITVARS_PLUGIN]); dvander@2193: } dvander@2193: ds@1952: inline void WriteOp_Move_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov eax, edx ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Move_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov edx, eax ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Xchg(JitWriter *jit) ds@1952: { ds@1952: //xchg eax, edx ds@1952: IA32_Xchg_Eax_Reg(jit, AMX_REG_ALT); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push(JitWriter *jit) ds@1952: { ds@1952: //push stack, DAT offset based ds@1952: //sub edi, 4 ds@1952: //mov ecx, [ebp+] ds@1952: //mov [edi], ecx ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: //optimize encoding a bit... faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val); ds@1952: } ds@1952: IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_TMP, MOD_MEM_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push_C(JitWriter *jit) ds@1952: { ds@1952: //push stack ds@1952: //mov [edi-4], ds@1952: //sub edi, 4 ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_STK, val, -4); ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Zero(JitWriter *jit) ds@1952: { ds@1952: //mov [ebp+], 0 ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_DAT, 0, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Rm_Imm32_Disp32(jit, AMX_REG_DAT, 0, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Zero_S(JitWriter *jit) ds@1952: { ds@1952: //mov [ebx+], 0 ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_FRM, 0, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Rm_Imm32_Disp32(jit, AMX_REG_FRM, 0, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push_S(JitWriter *jit) ds@1952: { ds@1952: //push stack, FRM offset based ds@1952: //sub edi, 4 ds@1952: //mov ecx, [ebx+] ds@1952: //mov [edi], ecx ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: //optimize encoding a bit... faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val); ds@1952: } ds@1952: IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_TMP, MOD_MEM_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov [edi-4], eax ds@1952: //sub edi, 4 ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_PRI, -4); ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov [edi-4], edx ds@1952: //sub edi, 4 ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_ALT, -4); ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push2_C(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_C(jit, 2); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push3_C(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_C(jit, 3); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push4_C(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_C(jit, 4); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push5_C(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_C(jit, 5); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push2_Adr(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_Addr(jit, 2); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push3_Adr(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_Addr(jit, 3); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push4_Adr(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_Addr(jit, 4); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push5_Adr(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_Addr(jit, 5); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push2_S(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_S(jit, 2); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push3_S(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_S(jit, 3); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push4_S(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_S(jit, 4); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push5_S(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN_S(jit, 5); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push5(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN(jit, 5); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push4(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN(jit, 4); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push3(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN(jit, 3); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Push2(JitWriter *jit) ds@1952: { ds@1952: Macro_PushN(jit, 2); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Zero_Pri(JitWriter *jit) ds@1952: { ds@1952: //xor eax, eax ds@1952: IA32_Xor_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Zero_Alt(JitWriter *jit) ds@1952: { ds@1952: //xor edx, edx ds@1952: IA32_Xor_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Add(JitWriter *jit) ds@1952: { ds@1952: //add eax, edx ds@1952: IA32_Add_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sub(JitWriter *jit) ds@1952: { ds@1952: //sub eax, edx ds@1952: IA32_Sub_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sub_Alt(JitWriter *jit) ds@1952: { ds@1952: //neg eax ds@1952: //add eax, edx ds@1952: IA32_Neg_Rm(jit, AMX_REG_PRI, MOD_REG); ds@1952: IA32_Add_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Proc(JitWriter *jit) ds@1952: { ds@1952: CompData *co = (CompData *)jit->data; ds@1952: ds@1952: /* Specialized code to align this taking in account the function magic number */ ds@1952: jitoffs_t cur_offs = jit->get_outputpos(); ds@1952: jitoffs_t offset = ((cur_offs & 0xFFFFFFF8) + 8) - cur_offs; ds@1952: if (!((offset + cur_offs) & 8)) ds@1952: { ds@1952: offset += 8; ds@1952: } ds@1952: if (offset) ds@1952: { ds@1952: for (jit_uint32_t i=0; iwrite_ubyte(IA32_INT3); ds@1952: } ds@1952: } ds@1952: ds@1952: /* Write the info struct about this function */ ds@1952: jit->write_uint32(JIT_FUNCMAGIC); ds@1952: jit->write_uint32(co->func_idx); ds@1952: ds@1952: /* Now we have to backpatch our reloction offset! */ ds@1952: { ds@1952: jitoffs_t offs = jit->get_inputpos() - sizeof(cell_t); ds@1952: jitcode_t rebase = ((CompData *)jit->data)->rebase; ds@1952: *(jitoffs_t *)((unsigned char *)rebase + offs) = jit->get_outputpos(); ds@1952: } ds@1952: ds@1952: /* Lastly, if we're writing, keep track of the function count */ ds@1952: if (jit->outbase) ds@1952: { ds@1952: co->func_idx++; ds@1952: } ds@1952: ds@1952: //push old frame on stack: ds@1952: //mov ecx, [esi+frm] ds@1952: //mov [edi-4], ecx ds@1952: //sub edi, 8 ;extra un-used slot for non-existant CIP ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_INFO, MOD_MEM_REG); ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_STK, AMX_REG_TMP, -4); ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG); ds@1952: //save frame: ds@1952: //mov ecx, edi - get new frame ds@1952: //mov ebx, edi - store frame back ds@1952: //sub ecx, ebp - relocate local frame ds@1952: //mov [esi+frm], ecx ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_REG); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_STK, MOD_REG); ds@1952: IA32_Sub_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_DAT, MOD_REG); ds@1952: IA32_Mov_Rm_Reg(jit, AMX_REG_INFO, AMX_REG_TMP, MOD_MEM_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Lidx_B(JitWriter *jit) ds@1952: { ds@1952: cell_t val = jit->read_cell(); ds@1952: //shl eax, ds@1952: //add eax, edx ds@1952: //mov eax, [ebp+eax] ds@1952: IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG); ds@1952: IA32_Add_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: Write_Check_VerifyAddr(jit, AMX_REG_PRI); ds@1952: IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Idxaddr_B(JitWriter *jit) ds@1952: { ds@1952: //shl eax, ds@1952: //add eax, edx ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG); ds@1952: IA32_Add_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Shl(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, edx ds@1952: //shl eax, cl ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Shl_Rm_CL(jit, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Shr(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, edx ds@1952: //shr eax, cl ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Shr_Rm_CL(jit, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sshr(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, edx ds@1952: //sar eax, cl ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Sar_Rm_CL(jit, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Shl_C_Pri(JitWriter *jit) ds@1952: { ds@1952: //shl eax, ds@1952: jit_uint8_t val = (jit_uint8_t)jit->read_cell(); ds@1952: if (val == 1) ds@1952: { ds@1952: IA32_Shl_Rm_1(jit, AMX_REG_PRI, MOD_REG); ds@1952: } else { ds@1952: IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, val, MOD_REG); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Shl_C_Alt(JitWriter *jit) ds@1952: { ds@1952: //shl edx, ds@1952: jit_uint8_t val = (jit_uint8_t)jit->read_cell(); ds@1952: if (val == 1) ds@1952: { ds@1952: IA32_Shl_Rm_1(jit, AMX_REG_ALT, MOD_REG); ds@1952: } else { ds@1952: IA32_Shl_Rm_Imm8(jit, AMX_REG_ALT, val, MOD_REG); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Shr_C_Pri(JitWriter *jit) ds@1952: { ds@1952: //shr eax, ds@1952: jit_uint8_t val = (jit_uint8_t)jit->read_cell(); ds@1952: if (val == 1) ds@1952: { ds@1952: IA32_Shr_Rm_1(jit, AMX_REG_PRI, MOD_REG); ds@1952: } else { ds@1952: IA32_Shr_Rm_Imm8(jit, AMX_REG_PRI, val, MOD_REG); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Shr_C_Alt(JitWriter *jit) ds@1952: { ds@1952: //shr edx, ds@1952: jit_uint8_t val = (jit_uint8_t)jit->read_cell(); ds@1952: if (val == 1) ds@1952: { ds@1952: IA32_Shr_Rm_1(jit, AMX_REG_ALT, MOD_REG); ds@1952: } else { ds@1952: IA32_Shr_Rm_Imm8(jit, AMX_REG_ALT, val, MOD_REG); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_SMul(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, edx ds@1952: //imul edx ds@1952: //mov edx, ecx ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG); ds@1952: IA32_IMul_Rm(jit, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_TMP, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Not(JitWriter *jit) ds@1952: { ds@1952: //test eax, eax ds@1952: //mov eax, 0 ds@1952: //sete al ds@1952: IA32_Test_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_E); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Neg(JitWriter *jit) ds@1952: { ds@1952: //neg eax ds@1952: IA32_Neg_Rm(jit, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Xor(JitWriter *jit) ds@1952: { ds@1952: //xor eax, edx ds@1952: IA32_Xor_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Or(JitWriter *jit) ds@1952: { ds@1952: //or eax, edx ds@1952: IA32_Or_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_And(JitWriter *jit) ds@1952: { ds@1952: //and eax, edx ds@1952: IA32_And_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Invert(JitWriter *jit) ds@1952: { ds@1952: //not eax ds@1952: IA32_Not_Rm(jit, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Add_C(JitWriter *jit) ds@1952: { ds@1952: //add eax, ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_PRI, (jit_int8_t)val, MOD_REG); ds@1952: else ds@1952: IA32_Add_Eax_Imm32(jit, val); ds@1952: } ds@1952: ds@1952: inline void WriteOp_SMul_C(JitWriter *jit) ds@1952: { ds@1952: //imul eax, ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: IA32_IMul_Reg_Imm8(jit, AMX_REG_PRI, MOD_REG, (jit_int8_t)val); ds@1952: else ds@1952: IA32_IMul_Reg_Imm32(jit, AMX_REG_PRI, MOD_REG, val); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sign_Pri(JitWriter *jit) ds@1952: { ds@1952: //shl eax, 24 ds@1952: //sar eax, 24 ds@1952: IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, 24, MOD_REG); ds@1952: IA32_Sar_Rm_Imm8(jit, AMX_REG_PRI, 24, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sign_Alt(JitWriter *jit) ds@1952: { ds@1952: //shl edx, 24 ds@1952: //sar edx, 24 ds@1952: IA32_Shl_Rm_Imm8(jit, AMX_REG_ALT, 24, MOD_REG); ds@1952: IA32_Sar_Rm_Imm8(jit, AMX_REG_ALT, 24, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Eq(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ; PRI == ALT ? ds@1952: //mov eax, 0 ds@1952: //sete al ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_E); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Neq(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ; PRI != ALT ? ds@1952: //mov eax, 0 ds@1952: //setne al ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_NE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sless(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ; PRI < ALT ? (signed) ds@1952: //mov eax, 0 ds@1952: //setl al ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_L); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sleq(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ; PRI <= ALT ? (signed) ds@1952: //mov eax, 0 ds@1952: //setle al ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_LE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sgrtr(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ; PRI > ALT ? (signed) ds@1952: //mov eax, 0 ds@1952: //setg al ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_G); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sgeq(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ; PRI >= ALT ? (signed) ds@1952: //mov eax, 0 ds@1952: //setge al ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_GE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Eq_C_Pri(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, ; PRI == value ? ds@1952: //mov eax, 0 ds@1952: //sete al ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_PRI, (jit_int8_t)val); ds@1952: else ds@1952: IA32_Cmp_Eax_Imm32(jit, val); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_E); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Eq_C_Alt(JitWriter *jit) ds@1952: { ds@1952: //xor eax, eax ds@1952: //cmp edx, ; ALT == value ? ds@1952: //sete al ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Xor_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_ALT, (jit_int8_t)val); ds@1952: else ds@1952: IA32_Cmp_Rm_Imm32(jit, MOD_REG, AMX_REG_ALT, val); ds@1952: IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_E); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Inc_Pri(JitWriter *jit) ds@1952: { ds@1952: //add eax, 1 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_PRI, 1, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Inc_Alt(JitWriter *jit) ds@1952: { ds@1952: //add edx, 1 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_ALT, 1, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Inc(JitWriter *jit) ds@1952: { ds@1952: //add [ebp+], 1 ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: IA32_Add_Rm_Imm8_Disp8(jit, AMX_REG_DAT, 1, (jit_int8_t)val); ds@1952: else ds@1952: IA32_Add_Rm_Imm8_Disp32(jit, AMX_REG_DAT, 1, val); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Inc_S(JitWriter *jit) ds@1952: { ds@1952: //add [ebx+], 1 ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: IA32_Add_Rm_Imm8_Disp8(jit, AMX_REG_FRM, 1, (jit_int8_t)val); ds@1952: else ds@1952: IA32_Add_Rm_Imm8_Disp32(jit, AMX_REG_FRM, 1, val); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Inc_I(JitWriter *jit) ds@1952: { ds@1952: //add [ebp+eax], 1 ds@1952: IA32_Add_RmEBP_Imm8_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_PRI, NOSCALE, 1); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Dec_Pri(JitWriter *jit) ds@1952: { ds@1952: //sub eax, 1 ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_PRI, 1, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Dec_Alt(JitWriter *jit) ds@1952: { ds@1952: //sub edx, 1 ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_ALT, 1, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Dec(JitWriter *jit) ds@1952: { ds@1952: //sub [ebp+], 1 ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Sub_Rm_Imm8_Disp8(jit, AMX_REG_DAT, 1, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Sub_Rm_Imm8_Disp32(jit, AMX_REG_DAT, 1, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Dec_S(JitWriter *jit) ds@1952: { ds@1952: //sub [ebx+], 1 ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Sub_Rm_Imm8_Disp8(jit, AMX_REG_FRM, 1, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Sub_Rm_Imm8_Disp32(jit, AMX_REG_FRM, 1, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Dec_I(JitWriter *jit) ds@1952: { ds@1952: //sub [ebp+eax], 1 ds@1952: IA32_Sub_RmEBP_Imm8_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_PRI, NOSCALE, 1); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Load_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov eax, [ebp+] ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_DAT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_DAT, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Load_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov edx, [ebp+] ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_DAT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_DAT, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Load_S_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov eax, [ebx+] ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_FRM, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_FRM, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Load_S_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov edx, [ebx+] ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_FRM, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_FRM, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Lref_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov eax, [ebp+] ds@1952: //mov eax, [ebp+eax] ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_DAT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_DAT, val); ds@1952: } ds@1952: IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Lref_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov edx, [ebp+] ds@1952: //mov edx, [ebp+edx] ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_DAT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_DAT, val); ds@1952: } ds@1952: IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_ALT, AMX_REG_DAT, AMX_REG_ALT, NOSCALE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Lref_S_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov eax, [ebx+] ds@1952: //mov eax, [ebp+eax] ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_FRM, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_FRM, val); ds@1952: } ds@1952: IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Lref_S_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov edx, [ebx+] ds@1952: //mov edx, [ebp+edx] ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_FRM, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_FRM, val); ds@1952: } ds@1952: IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_ALT, AMX_REG_DAT, AMX_REG_ALT, NOSCALE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Const_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov eax, ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, val); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Const_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov edx, ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_ALT, val); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Addr_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov eax, [esi+frm] ds@1952: //add eax, ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_INFO, MOD_MEM_REG); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_PRI, (jit_int8_t)val, MOD_REG); ds@1952: } else { ds@1952: IA32_Add_Eax_Imm32(jit, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Addr_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov edx, [esi+frm] ds@1952: //add edx, ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_INFO, MOD_MEM_REG); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_ALT, (jit_int8_t)val, MOD_REG); ds@1952: } else { ds@1952: IA32_Add_Rm_Imm32(jit, AMX_REG_ALT, val, MOD_REG); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Stor_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov [ebp+], eax ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_DAT, AMX_REG_PRI, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Rm_Reg_Disp32(jit, AMX_REG_DAT, AMX_REG_PRI, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Stor_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov [ebp+], edx ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_DAT, AMX_REG_ALT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Rm_Reg_Disp32(jit, AMX_REG_DAT, AMX_REG_ALT, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Stor_S_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov [ebx+], eax ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_FRM, AMX_REG_PRI, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Rm_Reg_Disp32(jit, AMX_REG_FRM, AMX_REG_PRI, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Stor_S_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov [ebx+], edx ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_FRM, AMX_REG_ALT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Rm_Reg_Disp32(jit, AMX_REG_FRM, AMX_REG_ALT, val); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Idxaddr(JitWriter *jit) ds@1952: { ds@1952: //lea eax, [edx+4*eax] ds@1952: IA32_Lea_Reg_DispRegMult(jit, AMX_REG_PRI, AMX_REG_ALT, AMX_REG_PRI, SCALE4); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sref_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, [ebp+] ds@1952: //mov [ebp+ecx], eax ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val); ds@1952: } ds@1952: IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_PRI); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sref_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, [ebp+] ds@1952: //mov [ebp+ecx], edx ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_DAT, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val); ds@1952: } ds@1952: IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_ALT); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sref_S_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, [ebx+] ds@1952: //mov [ebp+ecx], eax ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val); ds@1952: } ds@1952: IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_PRI); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sref_S_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, [ebx+] ds@1952: //mov [ebp+ecx], edx ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_FRM, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val); ds@1952: } ds@1952: IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_ALT); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Pop_Pri(JitWriter *jit) ds@1952: { ds@1952: //mov eax, [edi] ds@1952: //add edi, 4 ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_MEM_REG); ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Pop_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov edx, [edi] ds@1952: //add edi, 4 ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_STK, MOD_MEM_REG); ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Swap_Pri(JitWriter *jit) ds@1952: { ds@1952: //add [edi], eax ds@1952: //sub eax, [edi] ds@1952: //add [edi], eax ds@1952: //neg eax ds@1952: IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_PRI, MOD_MEM_REG); ds@1952: IA32_Sub_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_MEM_REG); ds@1952: IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_PRI, MOD_MEM_REG); ds@1952: IA32_Neg_Rm(jit, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Swap_Alt(JitWriter *jit) ds@1952: { ds@1952: //add [edi], edx ds@1952: //sub edx, [edi] ds@1952: //add [edi], edx ds@1952: //neg edx ds@1952: IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG); ds@1952: IA32_Sub_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_STK, MOD_MEM_REG); ds@1952: IA32_Add_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG); ds@1952: IA32_Neg_Rm(jit, AMX_REG_ALT, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_PushAddr(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, [esi+frm] ;get address (offset from frame) ds@1952: //sub edi, 4 ds@1952: //add ecx, ds@1952: //mov [edi], ecx ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_INFO, MOD_MEM_REG); ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_TMP, (jit_int8_t)val, MOD_REG); ds@1952: } else { ds@1952: IA32_Add_Rm_Imm32(jit, AMX_REG_TMP, val, MOD_REG); ds@1952: } ds@1952: IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_TMP, MOD_MEM_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Movs(JitWriter *jit) ds@1952: { ds@1952: //cld ds@1952: //push esi ds@1952: //push edi ds@1952: //lea esi, [ebp+eax] ds@1952: //lea edi, [ebp+edx] ds@1952: //if dword: ds@1952: // mov ecx, dword ds@1952: // rep movsd ds@1952: //if byte: ds@1952: // mov ecx, byte ds@1952: // rep movsb ds@1952: //pop edi ds@1952: //pop esi ds@1952: cell_t val = jit->read_cell(); ds@1952: unsigned int dwords = val >> 2; ds@1952: unsigned int bytes = val & 0x3; ds@1952: ds@1952: IA32_Cld(jit); ds@1952: IA32_Push_Reg(jit, REG_ESI); ds@1952: IA32_Push_Reg(jit, REG_EDI); ds@1952: IA32_Lea_Reg_DispEBPRegMult(jit, REG_ESI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE); ds@1952: IA32_Lea_Reg_DispEBPRegMult(jit, REG_EDI, AMX_REG_DAT, AMX_REG_ALT, NOSCALE); ds@1952: if (dwords) ds@1952: { ds@1952: IA32_Mov_Reg_Imm32(jit, REG_ECX, dwords); ds@1952: IA32_Rep(jit); ds@1952: IA32_Movsd(jit); ds@1952: } ds@1952: if (bytes) ds@1952: { ds@1952: IA32_Mov_Reg_Imm32(jit, REG_ECX, bytes); ds@1952: IA32_Rep(jit); ds@1952: IA32_Movsb(jit); ds@1952: } ds@1952: IA32_Pop_Reg(jit, REG_EDI); ds@1952: IA32_Pop_Reg(jit, REG_ESI); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Fill(JitWriter *jit) ds@1952: { ds@1952: //push edi ds@1952: //lea edi, [ebp+edx] ds@1952: //mov ecx, >> 2 ds@1952: //cld ds@1952: //rep stosd ds@1952: //pop edi ds@1952: unsigned int val = jit->read_cell() >> 2; ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EDI); ds@1952: IA32_Lea_Reg_DispEBPRegMult(jit, REG_EDI, AMX_REG_DAT, AMX_REG_ALT, NOSCALE); ds@1952: IA32_Mov_Reg_Imm32(jit, REG_ECX, val); ds@1952: IA32_Cld(jit); ds@1952: IA32_Rep(jit); ds@1952: IA32_Stosd(jit); ds@1952: IA32_Pop_Reg(jit, REG_EDI); ds@1952: } ds@1952: ds@1952: inline void WriteOp_GenArray(JitWriter *jit, bool autozero) ds@1952: { ds@1952: cell_t val = jit->read_cell(); ds@1952: if (val == 1) ds@1952: { ds@1952: /* flat array. we can generate this without indirection tables. */ ds@1952: /* Note that we can overwrite ALT because technically STACK should be destroying ALT */ ds@1952: //mov edx, [esi+info.heap] ds@1952: //mov ecx, [edi] ds@1952: //mov [edi], edx ;store base of array into stack ds@1952: //lea edx, [edx+ecx*4] ;get the final new heap pointer ds@1952: //mov [esi+info.heap], edx ;store heap pointer back ds@1952: //add edx, ebp ;relocate ds@1952: //cmp edx, edi ;compare against stack pointer ds@1952: //jae :error ;error out if not enough space ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_INFO, AMX_INFO_HEAP); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_MEM_REG); ds@1952: IA32_Mov_Rm_Reg(jit, AMX_REG_STK, AMX_REG_ALT, MOD_MEM_REG); ds@1952: IA32_Lea_Reg_DispRegMult(jit, AMX_REG_ALT, AMX_REG_ALT, AMX_REG_TMP, SCALE4); ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_INFO, AMX_REG_ALT, AMX_INFO_HEAP); ds@1952: IA32_Add_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_DAT, MOD_REG); ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_STK, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_AE, ((CompData *)jit->data)->jit_error_heaplow); ds@1952: ds@1952: WriteOp_Tracker_Push_Reg(jit, REG_ECX); ds@1952: ds@1952: if (autozero) ds@1952: { ds@1952: /* Zero out the array - inline a quick fill */ ds@1952: //push eax ;save pri ds@1952: //push edi ;save stk ds@1952: //xor eax, eax ;zero source ds@1952: //mov edi, [edi] ;get heap ptr out of the stack ds@1952: //add edi, ebp ;relocate ds@1952: //cld ;clear direction flag ds@1952: //rep stosd ;copy (note: ECX is sane from above) ds@1952: //pop edi ;pop stk ds@1952: //pop eax ;pop pri ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Push_Reg(jit, REG_EDI); ds@1952: IA32_Xor_Reg_Rm(jit, REG_EAX, REG_EAX, MOD_REG); ds@1952: IA32_Mov_Reg_Rm(jit, REG_EDI, REG_EDI, MOD_MEM_REG); ds@1952: IA32_Add_Reg_Rm(jit, REG_EDI, REG_EBP, MOD_REG); ds@1952: IA32_Cld(jit); ds@1952: IA32_Rep(jit); ds@1952: IA32_Stosd(jit); ds@1952: IA32_Pop_Reg(jit, REG_EDI); ds@1952: IA32_Pop_Reg(jit, REG_EAX); ds@1952: } ds@1952: } else { ds@1952: //mov ecx, num_dims ds@1952: //mov edx, 0/1 ds@1952: //call [genarray] ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_TMP, val); ds@1952: if (autozero) ds@1952: { ds@1952: IA32_Mov_Reg_Imm32(jit, REG_EDX, 1); ds@1952: } else { ds@1952: IA32_Mov_Reg_Imm32(jit, REG_EDX, 0); ds@1952: } ds@1952: jitoffs_t call = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32(jit, call, ((CompData *)jit->data)->jit_genarray); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Load_Both(JitWriter *jit) ds@1952: { ds@1952: WriteOp_Load_Pri(jit); ds@1952: WriteOp_Load_Alt(jit); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Load_S_Both(JitWriter *jit) ds@1952: { ds@1952: WriteOp_Load_S_Pri(jit); ds@1952: WriteOp_Load_S_Alt(jit); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Const(JitWriter *jit) ds@1952: { ds@1952: //mov [ebp+], ds@1952: cell_t addr = jit->read_cell(); ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (addr <= SCHAR_MAX && addr >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_DAT, val, (jit_int8_t)addr); ds@1952: } else { ds@1952: IA32_Mov_Rm_Imm32_Disp32(jit, AMX_REG_DAT, val, addr); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Const_S(JitWriter *jit) ds@1952: { ds@1952: //mov [ebx+], ds@1952: cell_t offs = jit->read_cell(); ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (offs <= SCHAR_MAX && offs >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_FRM, val, (jit_int8_t)offs); ds@1952: } else { ds@1952: IA32_Mov_Rm_Imm32_Disp32(jit, AMX_REG_FRM, val, offs); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Load_I(JitWriter *jit) ds@1952: { ds@1952: //mov eax, [ebp+eax] ds@1952: Write_Check_VerifyAddr(jit, AMX_REG_PRI); ds@1952: IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Lodb_I(JitWriter *jit) ds@1952: { ds@1952: Write_Check_VerifyAddr(jit, AMX_REG_PRI); ds@1952: ds@1952: //mov eax, [ebp+eax] ds@1952: IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE); ds@1952: ds@1952: //and eax, ds@1952: cell_t val = jit->read_cell(); ds@1952: switch(val) ds@1952: { ds@1952: case 1: ds@1952: { ds@1952: IA32_And_Eax_Imm32(jit, 0x000000FF); ds@1952: break; ds@1952: } ds@1952: case 2: ds@1952: { ds@1952: IA32_And_Eax_Imm32(jit, 0x0000FFFF); ds@1952: break; ds@1952: } ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Stor_I(JitWriter *jit) ds@1952: { ds@1952: //mov [ebp+edx], eax ds@1952: Write_Check_VerifyAddr(jit, AMX_REG_ALT); ds@1952: IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Strb_I(JitWriter *jit) ds@1952: { ds@1952: Write_Check_VerifyAddr(jit, AMX_REG_ALT); ds@1952: //mov [ebp+edx], eax ds@1952: cell_t val = jit->read_cell(); ds@1952: switch (val) ds@1952: { ds@1952: case 1: ds@1952: { ds@1952: IA32_Mov_Rm8EBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI); ds@1952: break; ds@1952: } ds@1952: case 2: ds@1952: { ds@1952: IA32_Mov_Rm16EBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI); ds@1952: break; ds@1952: } ds@1952: case 4: ds@1952: { ds@1952: IA32_Mov_RmEBP_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI); ds@1952: break; ds@1952: } ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Lidx(JitWriter *jit) ds@1952: { ds@1952: //lea eax, [edx+4*eax] ds@1952: //mov eax, [ebp+eax] ds@1952: IA32_Lea_Reg_DispRegMult(jit, AMX_REG_PRI, AMX_REG_ALT, AMX_REG_PRI, SCALE4); ds@1952: Write_Check_VerifyAddr(jit, AMX_REG_PRI); ds@1952: IA32_Mov_Reg_RmEBP_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Stack(JitWriter *jit) ds@1952: { ds@1952: //add edi, ds@1952: cell_t val = jit->read_cell(); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, (jit_int8_t)val, MOD_REG); ds@1952: } else { ds@1952: IA32_Add_Rm_Imm32(jit, AMX_REG_STK, val, MOD_REG); ds@1952: } ds@1952: ds@1952: if (val > 0) ds@1952: { ds@1952: Write_CheckStack_Min(jit); ds@1952: } else if (val < 0) { ds@1952: Write_CheckStack_Low(jit); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_StackAdjust(JitWriter *jit) ds@1952: { ds@1952: cell_t val = jit->read_cell(); ds@1952: ds@1952: assert(val <= 0); ds@1952: ds@1952: //lea edi, [ebx-val] ds@1952: faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Lea_DispRegImm8(jit, AMX_REG_STK, AMX_REG_FRM, val); ds@1952: } ds@1952: else ds@1952: { ds@1952: IA32_Lea_DispRegImm32(jit, AMX_REG_STK, AMX_REG_FRM, val); ds@1952: } ds@1952: ds@1952: /* We assume the compiler has generated good code -- ds@1952: * That is, we do not bother validating this amount! ds@1952: */ ds@1952: } ds@1952: ds@1952: inline void WriteOp_Heap(JitWriter *jit) ds@1952: { ds@1952: //mov edx, [esi+hea] ds@1952: //add [esi+hea], ds@1952: cell_t val = jit->read_cell(); ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, AMX_REG_INFO, AMX_INFO_HEAP); faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Add_Rm_Imm8_Disp8(jit, AMX_REG_INFO, (jit_int8_t)val, AMX_INFO_HEAP); ds@1952: } else { ds@1952: IA32_Add_Rm_Imm32_Disp8(jit, AMX_REG_INFO, val, AMX_INFO_HEAP); ds@1952: } ds@1952: ds@1952: /* NOTE: Backwards from op.stack */ ds@1952: if (val > 0) ds@1952: { ds@1952: Write_CheckHeap_Low(jit); ds@1952: } else if (val < 0) { ds@1952: Write_CheckHeap_Min(jit); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_SDiv(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, edx ds@1952: //mov edx, eax ds@1952: //sar edx, 31 ds@1952: //idiv ecx ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_ALT, AMX_REG_PRI, MOD_REG); ds@1952: IA32_Sar_Rm_Imm8(jit, AMX_REG_ALT, 31, MOD_REG); ds@1952: Write_Check_DivZero(jit, AMX_REG_TMP); ds@1952: IA32_IDiv_Rm(jit, AMX_REG_TMP, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_SDiv_Alt(JitWriter *jit) ds@1952: { ds@1952: //mov ecx, eax ds@1952: //mov eax, edx ds@1952: //sar edx, 31 ds@1952: //idiv ecx ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_PRI, MOD_REG); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Sar_Rm_Imm8(jit, AMX_REG_ALT, 31, MOD_REG); ds@1952: Write_Check_DivZero(jit, AMX_REG_TMP); ds@1952: IA32_IDiv_Rm(jit, AMX_REG_TMP, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Retn(JitWriter *jit) ds@1952: { ds@1952: //mov ebx, [edi+4] - get old frm ds@1952: //add edi, 8 - pop stack ds@1952: //mov [esi+frm], ebx - restore frame pointer ds@1952: //add ebx, ebp - relocate ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_FRM, AMX_REG_STK, 4); ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG); ds@1952: IA32_Mov_Rm_Reg(jit, AMX_REG_INFO, AMX_REG_FRM, MOD_MEM_REG); ds@1952: IA32_Add_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_DAT, MOD_REG); ds@1952: ds@1952: /* pop params */ ds@1952: //mov ecx, [edi] ds@1952: //lea edi, [edi+ecx*4+4] ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_STK, MOD_MEM_REG); ds@1952: IA32_Lea_Reg_DispRegMultImm8(jit, AMX_REG_STK, AMX_REG_STK, AMX_REG_TMP, SCALE4, 4); ds@1952: ds@1952: //ret - return (EIP on real stack!) ds@1952: IA32_Return(jit); ds@1952: } ds@1952: ds@1952: void ProfCallGate_Begin(sp_context_t *ctx, const char *name) ds@1952: { dvander@2193: ((IProfiler *)ctx->vm[JITVARS_PROFILER])->OnFunctionBegin((IPluginContext *)ctx->vm[JITVARS_BASECTX], name); ds@1952: } ds@1952: ds@1952: void ProfCallGate_End(sp_context_t *ctx) ds@1952: { dvander@2193: ((IProfiler *)ctx->vm[JITVARS_PROFILER])->OnFunctionEnd(); ds@1952: } ds@1952: ds@1952: const char *find_func_name(sp_plugin_t *plugin, uint32_t offs) ds@1952: { ds@1952: uint32_t max, iter; ds@1952: sp_fdbg_symbol_t *sym; ds@1952: sp_fdbg_arraydim_t *arr; ds@1952: uint8_t *cursor = (uint8_t *)(plugin->debug.symbols); ds@1952: ds@1952: max = plugin->debug.syms_num; ds@1952: for (iter = 0; iter < max; iter++) ds@1952: { ds@1952: sym = (sp_fdbg_symbol_t *)cursor; ds@1952: ds@1952: if (sym->ident == SP_SYM_FUNCTION ds@1952: && sym->codestart <= offs ds@1952: && sym->codeend > offs) ds@1952: { ds@1952: return plugin->debug.stringbase + sym->name; ds@1952: } ds@1952: ds@1952: if (sym->dimcount > 0) ds@1952: { ds@1952: cursor += sizeof(sp_fdbg_symbol_t); ds@1952: arr = (sp_fdbg_arraydim_t *)cursor; ds@1952: cursor += sizeof(sp_fdbg_arraydim_t) * sym->dimcount; ds@1952: continue; ds@1952: } ds@1952: ds@1952: cursor += sizeof(sp_fdbg_symbol_t); ds@1952: } ds@1952: ds@1952: return NULL; ds@1952: } ds@1952: ds@1952: inline void WriteOp_Call(JitWriter *jit) ds@1952: { ds@1952: cell_t offs; ds@1952: jitoffs_t jmp; ds@1952: CompData *data; ds@1952: ds@1952: data = (CompData *)jit->data; ds@1952: offs = jit->read_cell(); ds@1952: ds@1952: if ((data->profile & SP_PROF_FUNCTIONS) == SP_PROF_FUNCTIONS) ds@1952: { ds@1952: const char *name; ds@1952: ds@1952: /* Find the function name */ ds@1952: if ((name = find_func_name(data->plugin, offs)) == NULL) ds@1952: { ds@1952: name = "unknown"; ds@1952: } ds@1952: ds@1952: //push name ds@1952: //push [esi+context] ds@1952: //call ProfCallGate_Begin ds@1952: //add esp, 8 ds@1952: IA32_Push_Imm32(jit, (jit_int32_t)(intptr_t)name); ds@1952: IA32_Push_Rm_Disp8(jit, AMX_REG_INFO, AMX_INFO_CONTEXT); ds@1952: jmp = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32_Abs(jit, jmp, (void *)ProfCallGate_Begin); ds@1952: IA32_Add_Rm_Imm8(jit, REG_ESP, 8, MOD_REG); ds@1952: ds@1952: //call ds@1952: //push eax ds@1952: jmp = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32(jit, jmp, RelocLookup(jit, offs, false)); ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: ds@1952: //push [esi+context] ds@1952: //call ProfCallGate_End ds@1952: //add esp, 4 ds@1952: //pop eax ds@1952: IA32_Push_Rm_Disp8(jit, AMX_REG_INFO, AMX_INFO_CONTEXT); ds@1952: jmp = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32_Abs(jit, jmp, (void *)ProfCallGate_End); ds@1952: IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG); ds@1952: IA32_Pop_Reg(jit, REG_EAX); ds@1952: } ds@1952: else ds@1952: { ds@1952: jmp = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32(jit, jmp, RelocLookup(jit, offs, false)); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Bounds(JitWriter *jit) ds@1952: { ds@1952: cell_t val = jit->read_cell(); ds@1952: ds@1952: //cmp eax, ds@1952: //ja :error faluco@2029: if (val <= SCHAR_MAX && val >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_PRI, (jit_int8_t)val); ds@1952: } else { ds@1952: IA32_Cmp_Eax_Imm32(jit, val); ds@1952: } ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_A, ((CompData *)jit->data)->jit_error_bounds); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Halt(JitWriter *jit) ds@1952: { ds@1952: AlignMe(jit); ds@1952: ds@1952: //mov ecx, [esi+ret] ds@1952: //mov [ecx], eax ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_RETVAL); ds@1952: IA32_Mov_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_PRI, MOD_MEM_REG); ds@1952: ds@1952: /* :TODO: ds@1952: * We don't support sleeping or halting with weird values. ds@1952: * So we're omitting the mov eax that was here. ds@1952: */ ds@1952: jit->read_cell(); ds@1952: ds@1952: CompData *data = (CompData *)jit->data; ds@1952: IA32_Jump_Imm32_Abs(jit, data->jit_return); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Break(JitWriter *jit) ds@1952: { ds@1952: CompData *data = (CompData *)jit->data; ds@1952: if (data->debug) ds@1952: { ds@1952: //jit->write_ubyte(IA32_INT3); ds@1952: //mov ecx, ds@1952: jitoffs_t wr = IA32_Mov_Reg_Imm32(jit, AMX_REG_TMP, 0); ds@1952: jitoffs_t save = jit->get_outputpos(); ds@1952: jit->set_outputpos(wr); ds@1952: jit->write_uint32((uint32_t)(wr)); ds@1952: jit->set_outputpos(save); ds@1952: wr = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32(jit, wr, data->jit_break); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Jump(JitWriter *jit) ds@1952: { ds@1952: //jmp ds@1952: cell_t amx_offs = jit->read_cell(); ds@1952: IA32_Jump_Imm32_Abs(jit, RelocLookup(jit, amx_offs, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Jzer(JitWriter *jit) ds@1952: { ds@1952: //test eax, eax ds@1952: //jz ds@1952: cell_t target = jit->read_cell(); ds@1952: IA32_Test_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_Z, RelocLookup(jit, target, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Jnz(JitWriter *jit) ds@1952: { ds@1952: //test eax, eax ds@1952: //jnz ds@1952: cell_t target = jit->read_cell(); ds@1952: IA32_Test_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_PRI, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_NZ, RelocLookup(jit, target, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Jeq(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ds@1952: //je ds@1952: cell_t target = jit->read_cell(); ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_E, RelocLookup(jit, target, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Jneq(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ds@1952: //jne ds@1952: cell_t target = jit->read_cell(); ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_NE, RelocLookup(jit, target, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Jsless(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ds@1952: //jl ds@1952: cell_t target = jit->read_cell(); ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_L, RelocLookup(jit, target, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Jsleq(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ds@1952: //jle ds@1952: cell_t target = jit->read_cell(); ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_LE, RelocLookup(jit, target, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_JsGrtr(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ds@1952: //jg ds@1952: cell_t target = jit->read_cell(); ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_G, RelocLookup(jit, target, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_JsGeq(JitWriter *jit) ds@1952: { ds@1952: //cmp eax, edx ds@1952: //jge ds@1952: cell_t target = jit->read_cell(); ds@1952: IA32_Cmp_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_GE, RelocLookup(jit, target, false)); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Switch(JitWriter *jit) ds@1952: { ds@1952: cell_t offs = jit->read_cell(); ds@1952: cell_t *tbl = (cell_t *)((char *)jit->inbase + offs + sizeof(cell_t)); ds@1952: ds@1952: struct casetbl ds@1952: { ds@1952: cell_t val; ds@1952: cell_t offs; ds@1952: }; ds@1952: ds@1952: /* Read the number of cases, then advance by one */ ds@1952: cell_t num_cases = *tbl++; ds@1952: if (!num_cases) ds@1952: { ds@1952: /* Special treatment for 0 cases */ ds@1952: //jmp ds@1952: IA32_Jump_Imm32_Abs(jit, RelocLookup(jit, *tbl, false)); ds@1952: } else { ds@1952: /* Check if the case layout is fully sequential */ ds@1952: casetbl *iter = (casetbl *)(tbl + 1); ds@1952: casetbl *cases = iter; ds@1952: cell_t first = iter[0].val; ds@1952: cell_t last = first; ds@1952: bool sequential = true; ds@1952: for (cell_t i=1; i HIGH) ds@1952: * This check is valid for both sequential and non-sequential. ds@1952: */ ds@1952: cell_t low_bound = cases[0].val; ds@1952: if (low_bound != 0) ds@1952: { ds@1952: /* negate it so we'll get a lower bound of 0 */ ds@1952: //lea ecx, [eax-] ds@1952: low_bound = -low_bound; faluco@2029: if (low_bound >= SCHAR_MIN && low_bound <= SCHAR_MAX) ds@1952: { ds@1952: IA32_Lea_DispRegImm8(jit, AMX_REG_TMP, AMX_REG_PRI, low_bound); ds@1952: } else { ds@1952: IA32_Lea_DispRegImm32(jit, AMX_REG_TMP, AMX_REG_PRI, low_bound); ds@1952: } ds@1952: } else { ds@1952: //mov ecx, eax ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_PRI, MOD_REG); ds@1952: } ds@1952: cell_t high_bound = abs(cases[0].val - cases[num_cases-1].val); ds@1952: //cmp ecx, faluco@2029: if (high_bound >= SCHAR_MIN && high_bound <= SCHAR_MAX) ds@1952: { ds@1952: IA32_Cmp_Rm_Imm8(jit, MOD_REG, AMX_REG_TMP, high_bound); ds@1952: } else { ds@1952: IA32_Cmp_Rm_Imm32(jit, MOD_REG, AMX_REG_TMP, high_bound); ds@1952: } ds@1952: //ja ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_A, RelocLookup(jit, *tbl, false)); ds@1952: ds@1952: /** ds@1952: * Now we've taken the default case out of the way, it's time to do the ds@1952: * full check, which is different for sequential vs. non-sequential. ds@1952: */ ds@1952: if (sequential) ds@1952: { ds@1952: /* we're now theoretically guaranteed to be jumping to a correct offset. ds@1952: * ECX still has the correctly bound offset in it, luckily! ds@1952: * thus, we simply need to relocate ECX and store the cases. ds@1952: */ ds@1952: //lea ecx, [ecx*4] ds@1952: //add ecx, ds@1952: IA32_Lea_Reg_RegMultImm32(jit, AMX_REG_TMP, AMX_REG_TMP, SCALE4, 0); ds@1952: jitoffs_t tbl_offs = IA32_Add_Rm_Imm32_Later(jit, AMX_REG_TMP, MOD_REG); ds@1952: IA32_Jump_Rm(jit, AMX_REG_TMP, MOD_MEM_REG); ds@1952: /* The case table starts here. Go back and write the output pointer. */ ds@1952: jitoffs_t cur_pos = jit->get_outputpos(); ds@1952: jit->set_outputpos(tbl_offs); ds@1952: jit->write_uint32((jit_uint32_t)(jit->outbase + cur_pos)); ds@1952: jit->set_outputpos(cur_pos); ds@1952: //now we can write the case table, finally! ds@1952: jit_uint32_t base = (jit_uint32_t)jit->outbase; ds@1952: for (cell_t i=0; iwrite_uint32(base + RelocLookup(jit, cases[i].offs, false)); ds@1952: } ds@1952: } else { ds@1952: /* The slow version. Go through each case and generate a check. ds@1952: * In the future we should replace case tables of more than ~8 cases with a ds@1952: * hash table lookup. ds@1952: * :THOUGHT: Another method of optimizing this - fill in the gaps with jumps to the default case, ds@1952: * but only if we're under N cases or so! ds@1952: * :THOUGHT: Write out a static btree lookup :) ds@1952: */ ds@1952: cell_t val; ds@1952: for (cell_t i=0; i OR cmp al, faluco@2029: if (val >= SCHAR_MIN && val <= SCHAR_MAX) ds@1952: { ds@1952: IA32_Cmp_Al_Imm8(jit, val); ds@1952: } else { ds@1952: IA32_Cmp_Eax_Imm32(jit, cases[i].val); ds@1952: } ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_E, RelocLookup(jit, cases[i].offs, false)); ds@1952: } ds@1952: /* After all this, jump to the default case! */ ds@1952: IA32_Jump_Imm32_Abs(jit, RelocLookup(jit, *tbl, false)); ds@1952: } ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Casetbl(JitWriter *jit) ds@1952: { ds@1952: /* do nothing here, switch does all ze work */ ds@1952: cell_t num_cases = jit->read_cell(); ds@1952: ds@1952: /* Two cells per case, one extra case for the default jump */ ds@1952: num_cases = (num_cases * 2) + 1; ds@1952: jit->inptr += num_cases; ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sysreq_C(JitWriter *jit) ds@1952: { ds@1952: /* store the number of parameters on the stack, ds@1952: * and store the native index as well. ds@1952: */ ds@1952: cell_t native_index = jit->read_cell(); ds@1952: ds@1952: if ((uint32_t)native_index >= ((CompData*)jit->data)->plugin->info.natives_num) ds@1952: { ds@1952: ((CompData *)jit->data)->error_set = SP_ERROR_INSTRUCTION_PARAM; ds@1952: return; ds@1952: } ds@1952: ds@1952: //mov ecx, ds@1952: IA32_Mov_Reg_Imm32(jit, REG_ECX, native_index); ds@1952: ds@1952: jitoffs_t call = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32(jit, call, ((CompData *)jit->data)->jit_sysreq_c); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sysreq_N_NoInline(JitWriter *jit) ds@1952: { ds@1952: /* store the number of parameters on the stack, ds@1952: * and store the native index as well. ds@1952: */ ds@1952: cell_t native_index = jit->read_cell(); ds@1952: cell_t num_params = jit->read_cell(); ds@1952: ds@1952: if ((uint32_t)native_index >= ((CompData*)jit->data)->plugin->info.natives_num) ds@1952: { ds@1952: ((CompData *)jit->data)->error_set = SP_ERROR_INSTRUCTION_PARAM; ds@1952: return; ds@1952: } ds@1952: ds@1952: //mov eax, ds@1952: //mov ecx, ds@1952: IA32_Mov_Reg_Imm32(jit, REG_EAX, num_params); ds@1952: IA32_Mov_Reg_Imm32(jit, REG_ECX, native_index); ds@1952: ds@1952: jitoffs_t call = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32(jit, call, ((CompData *)jit->data)->jit_sysreq_n); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Sysreq_N(JitWriter *jit) ds@1952: { ds@1952: /* The big daddy of opcodes. */ ds@1952: cell_t native_index = jit->read_cell(); ds@1952: cell_t num_params = jit->read_cell(); ds@1952: CompData *data = (CompData *)jit->data; ds@1952: ds@1952: if ((uint32_t)native_index >= data->plugin->info.natives_num) ds@1952: { ds@1952: data->error_set = SP_ERROR_INSTRUCTION_PARAM; ds@1952: return; ds@1952: } ds@1952: ds@1952: /* store the number of parameters on the stack */ ds@1952: //mov [edi-4], num_params ds@1952: //sub edi, 4 ds@1952: IA32_Mov_Rm_Imm32_Disp8(jit, AMX_REG_STK, num_params, -4); ds@1952: IA32_Sub_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: ds@1952: /* save registers we will need */ ds@1952: //push edx ds@1952: IA32_Push_Reg(jit, AMX_REG_ALT); ds@1952: ds@1952: /* Align the stack to 16 bytes */ ds@1952: //push ebx ds@1952: //mov ebx, esp ds@1952: //and esp, 0xFFFFFF0 ds@1952: //sub esp, 4 ds@1952: IA32_Push_Reg(jit, REG_EBX); ds@1952: IA32_Mov_Reg_Rm(jit, REG_EBX, REG_ESP, MOD_REG); ds@1952: IA32_And_Rm_Imm8(jit, REG_ESP, MOD_REG, -16); ds@1952: IA32_Sub_Rm_Imm8(jit, REG_ESP, 4, MOD_REG); ds@1952: ds@1952: /* push some callback stuff */ ds@1952: //push edi ; stack ds@1952: //push ; native index ds@1952: IA32_Push_Reg(jit, AMX_REG_STK); faluco@2029: if (native_index <= SCHAR_MAX && native_index >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Push_Imm8(jit, (jit_int8_t)native_index); ds@1952: } else { ds@1952: IA32_Push_Imm32(jit, native_index); ds@1952: } ds@1952: ds@1952: /* Relocate stack, heap, frm information, then store back */ ds@1952: //mov eax, [esi+context] ds@1952: //mov ecx, [esi+hea] ds@1952: //sub edi, ebp ds@1952: //mov [eax+hp], ecx ds@1952: //mov ecx, [esi] ds@1952: //mov [eax+sp], edi ds@1952: //mov [eax+frm], ecx ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, AMX_REG_INFO, AMX_INFO_CONTEXT); ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_HEAP); ds@1952: IA32_Sub_Reg_Rm(jit, AMX_REG_STK, AMX_REG_DAT, MOD_REG); ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, REG_EAX, AMX_REG_TMP, offsetof(sp_context_t, hp)); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_INFO_FRM, MOD_MEM_REG); ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, REG_EAX, AMX_REG_STK, offsetof(sp_context_t, sp)); ds@1952: IA32_Mov_Rm_Reg_Disp8(jit, REG_EAX, AMX_REG_TMP, offsetof(sp_context_t, frm)); ds@1952: ds@1952: /* finally, push the last parameter and make the call */ ds@1952: //push eax ; context ds@1952: //call NativeCallback ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: jitoffs_t call = IA32_Call_Imm32(jit, 0); ds@1952: if (!data->debug) ds@1952: { ds@1952: if ((data->profile & SP_PROF_NATIVES) == SP_PROF_NATIVES) ds@1952: { ds@1952: IA32_Write_Jump32_Abs(jit, call, (void *)NativeCallback_Profile); ds@1952: } ds@1952: else ds@1952: { ds@1952: IA32_Write_Jump32_Abs(jit, call, (void *)NativeCallback); ds@1952: } ds@1952: } ds@1952: else ds@1952: { ds@1952: if ((data->profile & SP_PROF_NATIVES) == SP_PROF_NATIVES) ds@1952: { ds@1952: IA32_Write_Jump32_Abs(jit, call, (void *)NativeCallback_Debug_Profile); ds@1952: } ds@1952: else ds@1952: { ds@1952: IA32_Write_Jump32_Abs(jit, call, (void *)NativeCallback_Debug); ds@1952: } ds@1952: } ds@1952: ds@1952: /* check for errors */ ds@1952: //mov ecx, [esi+context] ds@1952: //cmp [ecx+err], 0 ds@1952: //jnz :error ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_CONTEXT); ds@1952: IA32_Cmp_Rm_Disp8_Imm8(jit, AMX_REG_TMP, offsetof(sp_context_t, n_err), 0); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_NZ, data->jit_extern_error); ds@1952: ds@1952: /* restore what we damaged */ ds@1952: //mov esp, ebx ds@1952: //pop ebx ds@1952: //add edi, ebp ds@1952: //pop edx ds@1952: IA32_Mov_Reg_Rm(jit, REG_ESP, REG_EBX, MOD_REG); ds@1952: IA32_Pop_Reg(jit, REG_EBX); ds@1952: IA32_Add_Reg_Rm(jit, AMX_REG_STK, AMX_REG_DAT, MOD_REG); ds@1952: IA32_Pop_Reg(jit, AMX_REG_ALT); ds@1952: ds@1952: /* pop the stack. do not check the margins. ds@1952: * Note that this is not a true macro - we don't bother to ds@1952: * set ALT here because nothing will be using it. ds@1952: */ ds@1952: num_params++; ds@1952: num_params *= 4; ds@1952: //add edi, faluco@2029: if (num_params <= SCHAR_MAX && num_params >= SCHAR_MIN) ds@1952: { ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, (jit_int8_t)num_params, MOD_REG); ds@1952: } else { ds@1952: IA32_Add_Rm_Imm32(jit, AMX_REG_STK, num_params, MOD_REG); ds@1952: } ds@1952: } ds@1952: ds@1952: inline void WriteOp_Tracker_Push_C(JitWriter *jit) ds@1952: { ds@1952: CompData *data = (CompData *)jit->data; ds@1952: cell_t val = jit->read_cell(); ds@1952: ds@1952: /* Save registers that may be damaged by the call */ ds@1952: //push eax ds@1952: //push edx ds@1952: IA32_Push_Reg(jit, AMX_REG_PRI); ds@1952: IA32_Push_Reg(jit, AMX_REG_ALT); ds@1952: ds@1952: /* Get the context ptr, push it and call the check */ ds@1952: //mov eax, [esi+context] ds@1952: //push eax ds@1952: //call JIT_VerifyOrAllocateTracker ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, AMX_REG_INFO, AMX_INFO_CONTEXT); ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: jitoffs_t call = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32_Abs(jit, call, (void *)JIT_VerifyOrAllocateTracker); ds@1952: ds@1952: /* Check for errors */ ds@1952: //cmp eax, 0 ds@1952: //jnz :error ds@1952: IA32_Cmp_Rm_Imm8(jit, MOD_REG, REG_EAX, 0); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_NZ, data->jit_return); ds@1952: ds@1952: /* Restore */ ds@1952: //pop eax ds@1952: IA32_Pop_Reg(jit, REG_EAX); ds@1952: ds@1952: /* Push the value into the stack and increment pCur */ ds@1952: //mov edx, [eax+vm[]] ds@1952: //mov ecx, [edx+pcur] ds@1952: //add [edx+pcur], 4 ds@1952: //mov [ecx], *4 ; we want the count in bytes not in cells ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, REG_EDX, REG_EAX, offsetof(sp_context_t, vm[JITVARS_TRACKER])); ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, REG_EDX, offsetof(tracker_t, pCur)); ds@1952: IA32_Add_Rm_Imm8_Disp8(jit, REG_EDX, 4, offsetof(tracker_t, pCur)); ds@1952: IA32_Mov_Rm_Imm32(jit, AMX_REG_TMP, val*4, MOD_MEM_REG); ds@1952: ds@1952: /* Restore PRI & ALT */ ds@1952: //pop edx ds@1952: //pop eax ds@1952: IA32_Pop_Reg(jit, AMX_REG_ALT); ds@1952: IA32_Pop_Reg(jit, AMX_REG_PRI); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Tracker_Pop_SetHeap(JitWriter *jit) ds@1952: { ds@1952: CompData *data = (CompData *)jit->data; ds@1952: ds@1952: /* Save registers that may be damaged by the call */ ds@1952: //push eax ds@1952: //push edx ds@1952: IA32_Push_Reg(jit, AMX_REG_PRI); ds@1952: IA32_Push_Reg(jit, AMX_REG_ALT); ds@1952: ds@1952: /* Get the context ptr, push it and call the check */ ds@1952: //mov eax, [esi+context] ds@1952: //push eax ds@1952: //call JIT_VerifyLowBoundTracker ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, REG_EAX, AMX_REG_INFO, AMX_INFO_CONTEXT); ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: jitoffs_t call = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32_Abs(jit, call, (void *)JIT_VerifyLowBoundTracker); ds@1952: ds@1952: /* Check for errors */ ds@1952: //cmp eax, 0 ds@1952: //jnz :error ds@1952: IA32_Cmp_Rm_Imm8(jit, MOD_REG, REG_EAX, 0); ds@1952: IA32_Jump_Cond_Imm32_Abs(jit, CC_NZ, data->jit_return); ds@1952: ds@1952: /* Restore */ ds@1952: //pop eax ds@1952: IA32_Pop_Reg(jit, REG_EAX); ds@1952: ds@1952: /* Pop the value from the stack and decrease the heap by it*/ ds@1952: //mov edx, [eax+vm[]] ds@1952: //sub [edx+pcur], 4 ds@1952: //mov ecx, [edx+pcur] ds@1952: //mov ecx, [ecx] ds@1952: //sub [esi+hea], ecx ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, REG_EDX, REG_EAX, offsetof(sp_context_t, vm[JITVARS_TRACKER])); ds@1952: IA32_Sub_Rm_Imm8_Disp8(jit, REG_EDX, 4, offsetof(tracker_t, pCur)); ds@1952: IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, REG_EDX, offsetof(tracker_t, pCur)); ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_TMP, AMX_REG_TMP, MOD_MEM_REG); ds@1952: IA32_Sub_Rm_Reg_Disp8(jit, AMX_REG_INFO, AMX_REG_TMP, AMX_INFO_HEAP); ds@1952: ds@1952: Write_CheckHeap_Min(jit); ds@1952: ds@1952: /* Restore PRI & ALT */ ds@1952: //pop edx ds@1952: //pop eax ds@1952: IA32_Pop_Reg(jit, AMX_REG_ALT); ds@1952: IA32_Pop_Reg(jit, AMX_REG_PRI); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Stradjust_Pri(JitWriter *jit) ds@1952: { ds@1952: //add eax, 4 ds@1952: //sar eax, 2 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_PRI, 4, MOD_REG); ds@1952: IA32_Sar_Rm_Imm8(jit, AMX_REG_PRI, 2, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_FloatAbs(JitWriter *jit) ds@1952: { ds@1952: //mov eax, [edi] ds@1952: //and eax, 0x7FFFFFFF ds@1952: IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_MEM_REG); ds@1952: IA32_And_Eax_Imm32(jit, 0x7FFFFFFF); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 4 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_Float(JitWriter *jit) ds@1952: { ds@1952: //fild [edi] ds@1952: //push eax ds@1952: //fstp [esp] ds@1952: //pop eax ds@1952: IA32_Fild_Mem32(jit, AMX_REG_STK); ds@1952: IA32_Push_Reg(jit, AMX_REG_PRI); ds@1952: IA32_Fstp_Mem32_ESP(jit); ds@1952: IA32_Pop_Reg(jit, AMX_REG_PRI); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 4 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_FloatAdd(JitWriter *jit) ds@1952: { ds@1952: //push eax ds@1952: //fld [edi] ds@1952: //fadd [edi+4] ds@1952: //fstp [esp] ds@1952: //pop eax ds@1952: IA32_Push_Reg(jit, AMX_REG_PRI); ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: IA32_Fadd_Mem32_Disp8(jit, AMX_REG_STK, 4); ds@1952: IA32_Fstp_Mem32_ESP(jit); ds@1952: IA32_Pop_Reg(jit, AMX_REG_PRI); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 8 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_FloatSub(JitWriter *jit) ds@1952: { ds@1952: //push eax ds@1952: //fld [edi] ds@1952: //fsub [edi+4] ds@1952: //fstp [esp] ds@1952: //pop eax ds@1952: IA32_Push_Reg(jit, AMX_REG_PRI); ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: IA32_Fsub_Mem32_Disp8(jit, AMX_REG_STK, 4); ds@1952: IA32_Fstp_Mem32_ESP(jit); ds@1952: IA32_Pop_Reg(jit, AMX_REG_PRI); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 8 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_FloatMul(JitWriter *jit) ds@1952: { ds@1952: //push eax ds@1952: //fld [edi] ds@1952: //fmul [edi+4] ds@1952: //fstp [esp] ds@1952: //pop eax ds@1952: IA32_Push_Reg(jit, AMX_REG_PRI); ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: IA32_Fmul_Mem32_Disp8(jit, AMX_REG_STK, 4); ds@1952: IA32_Fstp_Mem32_ESP(jit); ds@1952: IA32_Pop_Reg(jit, AMX_REG_PRI); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 8 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_FloatDiv(JitWriter *jit) ds@1952: { ds@1952: //push eax ds@1952: //fld [edi] ds@1952: //fdiv [edi+4] ds@1952: //fstp [esp] ds@1952: //pop eax ds@1952: IA32_Push_Reg(jit, AMX_REG_PRI); ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: IA32_Fdiv_Mem32_Disp8(jit, AMX_REG_STK, 4); ds@1952: IA32_Fstp_Mem32_ESP(jit); ds@1952: IA32_Pop_Reg(jit, AMX_REG_PRI); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 8 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_RountToNearest(JitWriter *jit) ds@1952: { ds@1952: //push eax ds@1952: //fld [edi] ds@1952: ds@1952: //fstcw [esp] ds@1952: //mov eax, [esp] ds@1952: //push eax ds@1952: ds@1952: //mov [esp+4], 0x3FF ds@1952: //fadd st(0), st(0) ds@1952: //fldcw [esp+4] ds@1952: ds@1952: //push eax ds@1952: //push 0x3F000000 ; 0.5f ds@1952: //fadd [esp] ds@1952: //fistp [esp+4] ds@1952: //pop eax ds@1952: //pop eax ds@1952: ds@1952: //pop ecx ds@1952: //sar eax, 1 ds@1952: //mov [esp], ecx ds@1952: //fldcw [esp] ds@1952: //add esp, 4 ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: ds@1952: IA32_Fstcw_Mem16_ESP(jit); ds@1952: IA32_Mov_Reg_RmESP(jit, REG_EAX); ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: ds@1952: IA32_Mov_ESP_Disp8_Imm32(jit, 4, 0x3FF); ds@1952: IA32_Fadd_FPUreg_ST0(jit, 0); ds@1952: IA32_Fldcw_Mem16_Disp8_ESP(jit, 4); ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Push_Imm32(jit, 0x3F000000); ds@1952: IA32_Fadd_Mem32_ESP(jit); ds@1952: IA32_Fistp_Mem32_Disp8_Esp(jit, 4); ds@1952: IA32_Pop_Reg(jit, REG_EAX); ds@1952: IA32_Pop_Reg(jit, AMX_REG_PRI); ds@1952: ds@1952: IA32_Pop_Reg(jit, REG_ECX); ds@1952: IA32_Sar_Rm_1(jit, REG_EAX, MOD_REG); ds@1952: IA32_Mov_RmESP_Reg(jit, REG_ECX); ds@1952: IA32_Fldcw_Mem16_ESP(jit); ds@1952: IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 4 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_RoundToFloor(JitWriter *jit) ds@1952: { ds@1952: //push eax ds@1952: //fld [edi] ds@1952: ds@1952: //fstcw [esp] ds@1952: //mov eax, [esp] ds@1952: //push eax ds@1952: ds@1952: //mov [esp+4], 0x7FF ds@1952: //fldcw [esp+4] ds@1952: ds@1952: //push eax ds@1952: //fistp [esp] ds@1952: //pop eax ds@1952: ds@1952: //pop ecx ds@1952: //mov [esp], ecx ds@1952: //fldcw [esp] ds@1952: //add esp, 4 ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: ds@1952: IA32_Fstcw_Mem16_ESP(jit); ds@1952: IA32_Mov_Reg_RmESP(jit, REG_EAX); ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: ds@1952: IA32_Mov_ESP_Disp8_Imm32(jit, 4, 0x7FF); ds@1952: IA32_Fldcw_Mem16_Disp8_ESP(jit, 4); ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Fistp_Mem32_ESP(jit); ds@1952: IA32_Pop_Reg(jit, REG_EAX); ds@1952: ds@1952: IA32_Pop_Reg(jit, REG_ECX); ds@1952: IA32_Mov_RmESP_Reg(jit, REG_ECX); ds@1952: IA32_Fldcw_Mem16_ESP(jit); ds@1952: IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 4 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_RoundToCeil(JitWriter *jit) ds@1952: { ds@1952: //push eax ds@1952: //fld [edi] ds@1952: ds@1952: //fstcw [esp] ds@1952: //mov eax, [esp] ds@1952: //push eax ds@1952: ds@1952: //mov [esp+4], 0xBFF ds@1952: //fldcw [esp+4] ds@1952: ds@1952: //push eax ds@1952: //fistp [esp] ds@1952: //pop eax ds@1952: ds@1952: //pop ecx ds@1952: //mov [esp], ecx ds@1952: //fldcw [esp] ds@1952: //add esp, 4 ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: ds@1952: IA32_Fstcw_Mem16_ESP(jit); ds@1952: IA32_Mov_Reg_RmESP(jit, REG_EAX); ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: ds@1952: IA32_Mov_ESP_Disp8_Imm32(jit, 4, 0xBFF); ds@1952: IA32_Fldcw_Mem16_Disp8_ESP(jit, 4); ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Fistp_Mem32_ESP(jit); ds@1952: IA32_Pop_Reg(jit, REG_EAX); ds@1952: ds@1952: IA32_Pop_Reg(jit, REG_ECX); ds@1952: IA32_Mov_RmESP_Reg(jit, REG_ECX); ds@1952: IA32_Fldcw_Mem16_ESP(jit); ds@1952: IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 4 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_RoundToZero(JitWriter *jit) ds@1952: { ds@1952: //push eax ds@1952: //fld [edi] ds@1952: ds@1952: //fstcw [esp] ds@1952: //mov eax, [esp] ds@1952: //push eax ds@1952: ds@1952: //mov [esp+4], 0xFFF ds@1952: //fldcw [esp+4] ds@1952: ds@1952: //push eax ds@1952: //fistp [esp] ds@1952: //pop eax ds@1952: ds@1952: //pop ecx ds@1952: //mov [esp], ecx ds@1952: //fldcw [esp] ds@1952: //add esp, 4 ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: ds@1952: IA32_Fstcw_Mem16_ESP(jit); ds@1952: IA32_Mov_Reg_RmESP(jit, REG_EAX); ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: ds@1952: IA32_Mov_ESP_Disp8_Imm32(jit, 4, 0xFFF); ds@1952: IA32_Fldcw_Mem16_Disp8_ESP(jit, 4); ds@1952: ds@1952: IA32_Push_Reg(jit, REG_EAX); ds@1952: IA32_Fistp_Mem32_ESP(jit); ds@1952: IA32_Pop_Reg(jit, REG_EAX); ds@1952: ds@1952: IA32_Pop_Reg(jit, REG_ECX); ds@1952: IA32_Mov_RmESP_Reg(jit, REG_ECX); ds@1952: IA32_Fldcw_Mem16_ESP(jit); ds@1952: IA32_Add_Rm_Imm8(jit, REG_ESP, 4, MOD_REG); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 4 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG); ds@1952: } ds@1952: ds@1952: inline void WriteOp_FloatCompare(JitWriter *jit) ds@1952: { ds@1952: CompData *data = (CompData *)jit->data; ds@1952: ds@1952: //fld [edi] ds@1952: //fld [edi+4] ds@1952: //fucomip st(0), st(1) ds@1952: //mov ecx, ds@1952: //cmovz eax, [ecx+4] ds@1952: //cmovb eax, [ecx+8] ds@1952: //cmova eax, [ecx] ds@1952: //fstp st(0) ds@1952: ds@1952: IA32_Fld_Mem32(jit, AMX_REG_STK); ds@1952: IA32_Fld_Mem32_Disp8(jit, AMX_REG_STK, 4); ds@1952: IA32_Fucomip_ST0_FPUreg(jit, 1); ds@1952: IA32_Mov_Reg_Imm32(jit, AMX_REG_TMP, (jit_int32_t)jit->outbase + data->jit_rounding_table); ds@1952: IA32_CmovCC_Rm_Disp8(jit, AMX_REG_TMP, CC_Z, 4); ds@1952: IA32_CmovCC_Rm_Disp8(jit, AMX_REG_TMP, CC_B, 8); ds@1952: IA32_CmovCC_Rm(jit, AMX_REG_TMP, CC_A); ds@1952: IA32_Fstp_FPUreg(jit, 0); ds@1952: ds@1952: /* Rectify the stack */ ds@1952: //add edi, 8 ds@1952: IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 8, MOD_REG); ds@1952: } ds@1952: ds@1952: /************************************************* ds@1952: ************************************************* ds@1952: * JIT PROPER ************************************ ds@1952: * The rest from now on is the JIT engine * ds@1952: ************************************************* ds@1952: *************************************************/ ds@1952: ds@1952: cell_t NativeCallback(sp_context_t *ctx, ucell_t native_idx, cell_t *params) ds@1952: { ds@1952: sp_native_t *native; dvander@2193: sp_plugin_t *plugin; dvander@2193: dvander@2193: plugin = (sp_plugin_t *)ctx->vm[JITVARS_PLUGIN]; ds@1952: dvander@2193: native = &plugin->natives[native_idx]; ds@1952: ds@1952: ctx->n_idx = native_idx; ds@1952: ds@1952: /* Technically both aren't needed, I guess */ ds@1952: if (native->status == SP_NATIVE_UNBOUND) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_INVALID_NATIVE; ds@1952: return 0; ds@1952: } ds@1952: dvander@2193: return native->pfn(GET_CONTEXT(ctx), params); ds@1952: } ds@1952: ds@1952: cell_t NativeCallback_Profile(sp_context_t *ctx, ucell_t native_idx, cell_t *params) ds@1952: { ds@1952: cell_t val; ds@1952: sp_native_t *native; dvander@2193: sp_plugin_t *plugin; dvander@2193: dvander@2193: plugin = (sp_plugin_t *)ctx->vm[JITVARS_PLUGIN]; dvander@2193: dvander@2193: native = &plugin->natives[native_idx]; ds@1952: ds@1952: ctx->n_idx = native_idx; ds@1952: ds@1952: /* Technically both aren't needed, I guess */ ds@1952: if (native->status == SP_NATIVE_UNBOUND) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_INVALID_NATIVE; ds@1952: return 0; ds@1952: } ds@1952: dvander@2193: plugin->profiler->OnNativeBegin(GET_CONTEXT(ctx), native); dvander@2193: val = native->pfn(GET_CONTEXT(ctx), params); dvander@2193: plugin->profiler->OnNativeEnd(); ds@1952: ds@1952: return val; ds@1952: } ds@1952: ds@1952: cell_t NativeCallback_Debug(sp_context_t *ctx, ucell_t native_idx, cell_t *params) ds@1952: { ds@1952: cell_t save_sp = ctx->sp; ds@1952: cell_t save_hp = ctx->hp; ds@1952: dvander@2193: sp_plugin_t *pl = GETPLUGIN(ctx); dvander@2193: ds@1952: ctx->n_idx = native_idx; ds@1952: dvander@2193: if (ctx->hp < (cell_t)pl->data_size) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_HEAPMIN; ds@1952: return 0; ds@1952: } ds@1952: ds@1952: if (ctx->hp + STACK_MARGIN > ctx->sp) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_STACKLOW; ds@1952: return 0; ds@1952: } ds@1952: dvander@2193: if ((uint32_t)ctx->sp >= pl->mem_size) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_STACKMIN; ds@1952: return 0; ds@1952: } ds@1952: ds@1952: cell_t result = NativeCallback(ctx, native_idx, params); ds@1952: ds@1952: if (ctx->n_err != SP_ERROR_NONE) ds@1952: { ds@1952: return result; ds@1952: } ds@1952: ds@1952: if (save_sp != ctx->sp) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_STACKLEAK; ds@1952: return result; ds@1952: } ds@1952: else if (save_hp != ctx->hp) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_HEAPLEAK; ds@1952: return result; ds@1952: } ds@1952: ds@1952: return result; ds@1952: } ds@1952: ds@1952: cell_t NativeCallback_Debug_Profile(sp_context_t *ctx, ucell_t native_idx, cell_t *params) ds@1952: { ds@1952: cell_t save_sp = ctx->sp; ds@1952: cell_t save_hp = ctx->hp; ds@1952: dvander@2193: sp_plugin_t *pl = GETPLUGIN(ctx); dvander@2193: ds@1952: ctx->n_idx = native_idx; ds@1952: dvander@2193: if (ctx->hp < (cell_t)pl->data_size) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_HEAPMIN; ds@1952: return 0; ds@1952: } ds@1952: ds@1952: if (ctx->hp + STACK_MARGIN > ctx->sp) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_STACKLOW; ds@1952: return 0; ds@1952: } ds@1952: dvander@2193: if ((uint32_t)ctx->sp >= pl->mem_size) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_STACKMIN; ds@1952: return 0; ds@1952: } ds@1952: ds@1952: cell_t result = NativeCallback_Profile(ctx, native_idx, params); ds@1952: ds@1952: if (ctx->n_err != SP_ERROR_NONE) ds@1952: { ds@1952: return result; ds@1952: } ds@1952: ds@1952: if (save_sp != ctx->sp) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_STACKLEAK; ds@1952: return result; ds@1952: } ds@1952: else if (save_hp != ctx->hp) ds@1952: { ds@1952: ctx->n_err = SP_ERROR_HEAPLEAK; ds@1952: return result; ds@1952: } ds@1952: ds@1952: return result; ds@1952: } ds@1952: ds@1952: static cell_t InvalidNative(IPluginContext *pCtx, const cell_t *params) ds@1952: { dvander@2193: return pCtx->ThrowNativeErrorEx(SP_ERROR_INVALID_NATIVE, "Invalid native"); ds@1952: } ds@1952: ds@1952: jitoffs_t RelocLookup(JitWriter *jit, cell_t pcode_offs, bool relative) ds@1952: { ds@1952: if (jit->outptr) ds@1952: { ds@1952: CompData *data = (CompData *)jit->data; ds@1952: if (relative) ds@1952: { ds@1952: /* The actual offset is EIP relative. We need to relocate it. ds@1952: * Note that this assumes that we're pointing to the next op. ds@1952: */ ds@1952: pcode_offs += jit->get_inputpos(); ds@1952: } ds@1952: /* Offset must always be 1)positive and 2)less than or equal to the codesize */ ds@1952: assert(pcode_offs >= 0 && (uint32_t)pcode_offs <= data->codesize); ds@1952: /* Do the lookup in the native dictionary. */ ds@1952: return *(jitoffs_t *)(data->rebase + pcode_offs); ds@1952: } ds@1952: else ds@1952: { ds@1952: return 0; ds@1952: } ds@1952: } ds@1952: ds@1952: void WriteErrorRoutines(CompData *data, JitWriter *jit) ds@1952: { ds@1952: AlignMe(jit); ds@1952: ds@1952: data->jit_error_divzero = jit->get_outputpos(); ds@1952: Write_SetError(jit, SP_ERROR_DIVIDE_BY_ZERO); ds@1952: ds@1952: data->jit_error_stacklow = jit->get_outputpos(); ds@1952: Write_SetError(jit, SP_ERROR_STACKLOW); ds@1952: ds@1952: data->jit_error_stackmin = jit->get_outputpos(); ds@1952: Write_SetError(jit, SP_ERROR_STACKMIN); ds@1952: ds@1952: data->jit_error_bounds = jit->get_outputpos(); ds@1952: Write_SetError(jit, SP_ERROR_ARRAY_BOUNDS); ds@1952: ds@1952: data->jit_error_memaccess = jit->get_outputpos(); ds@1952: Write_SetError(jit, SP_ERROR_MEMACCESS); ds@1952: ds@1952: data->jit_error_heaplow = jit->get_outputpos(); ds@1952: Write_SetError(jit, SP_ERROR_HEAPLOW); ds@1952: ds@1952: data->jit_error_heapmin = jit->get_outputpos(); ds@1952: Write_SetError(jit, SP_ERROR_HEAPMIN); ds@1952: ds@1952: data->jit_error_array_too_big = jit->get_outputpos(); ds@1952: Write_SetError(jit, SP_ERROR_ARRAY_TOO_BIG); ds@1952: ds@1952: data->jit_extern_error = jit->get_outputpos(); ds@1952: Write_GetError(jit); ds@1952: } ds@1952: dvander@2193: bool JITX86::Compile(ICompilation *co, BaseRuntime *prt, int *err) ds@1952: { ds@1952: CompData *data = (CompData *)co; ds@1952: sp_plugin_t *plugin = data->plugin; ds@1952: dvander@2193: if (data->plugin == NULL) dvander@2193: { dvander@2193: if (data->debug && !(prt->m_pPlugin->flags & SP_FLAG_DEBUG)) dvander@2193: { dvander@2193: if (err != NULL) dvander@2193: { dvander@2193: *err = SP_ERROR_NOTDEBUGGING; dvander@2193: } dvander@2193: co->Abort(); dvander@2193: return false; dvander@2193: } dvander@2193: dvander@2193: data->SetRuntime(prt); dvander@2193: plugin = data->plugin; dvander@2193: } dvander@2193: ds@1952: /* The first phase is to browse */ ds@1952: uint8_t *code = plugin->pcode; ds@1952: uint8_t *end_cip = plugin->pcode + plugin->pcode_size; ds@1952: OPCODE op; ds@1952: ds@1952: /********************************************* ds@1952: * FIRST PASS (medium load): writer.outbase is NULL, getting size only ds@1952: * SECOND PASS (heavy load!!): writer.outbase is valid and output is written ds@1952: *********************************************/ ds@1952: ds@1952: JitWriter writer; ds@1952: JitWriter *jit = &writer; ds@1952: cell_t *endptr = (cell_t *)(end_cip); ds@1952: uint32_t codemem = 0; ds@1952: ds@1952: /* Initial code is written "blank," ds@1952: * so we can check the exact memory usage. ds@1952: */ ds@1952: data->codesize = plugin->pcode_size; ds@1952: writer.data = data; ds@1952: writer.inbase = (cell_t *)code; ds@1952: writer.outptr = NULL; ds@1952: writer.outbase = NULL; ds@1952: /* Allocate relocation. One extra cell for final CIP. */ ds@1952: data->rebase = (jitcode_t)engine->BaseAlloc(plugin->pcode_size + sizeof(cell_t)); ds@1952: ds@1952: /* We will jump back here for second pass */ ds@1952: jit_rewind: ds@1952: /* Initialize pass vars */ ds@1952: writer.inptr = writer.inbase; ds@1952: data->jit_verify_addr_eax = 0; ds@1952: data->jit_verify_addr_edx = 0; ds@1952: ds@1952: /* Write the prologue of the JIT */ ds@1952: data->jit_return = Write_Execute_Function(jit); ds@1952: ds@1952: /* Write the SYSREQ.N opcode if we need to */ ds@1952: if (!(data->inline_level & JIT_INLINE_NATIVES)) ds@1952: { ds@1952: AlignMe(jit); ds@1952: data->jit_sysreq_n = jit->get_outputpos(); ds@1952: WriteOp_Sysreq_N_Function(jit); ds@1952: } ds@1952: ds@1952: /* Write the debug section if we need it */ ds@1952: if (data->debug == true) ds@1952: { ds@1952: AlignMe(jit); ds@1952: data->jit_break = jit->get_outputpos(); ds@1952: Write_BreakDebug(jit); ds@1952: } ds@1952: ds@1952: /* Plugins compiled with -O0 will need this! */ ds@1952: AlignMe(jit); ds@1952: data->jit_sysreq_c = jit->get_outputpos(); ds@1952: WriteOp_Sysreq_C_Function(jit); ds@1952: ds@1952: AlignMe(jit); ds@1952: data->jit_genarray = jit->get_outputpos(); ds@1952: WriteIntrinsic_GenArray(jit); ds@1952: ds@1952: /* Write error checking routines that are called to */ ds@1952: if (!(data->inline_level & JIT_INLINE_ERRORCHECKS)) ds@1952: { ds@1952: AlignMe(jit); ds@1952: data->jit_verify_addr_eax = jit->get_outputpos(); ds@1952: Write_Check_VerifyAddr(jit, REG_EAX); ds@1952: ds@1952: AlignMe(jit); ds@1952: data->jit_verify_addr_edx = jit->get_outputpos(); ds@1952: Write_Check_VerifyAddr(jit, REG_EDX); ds@1952: } ds@1952: ds@1952: /* Write the rounding table for the float compare opcode */ ds@1952: data->jit_rounding_table = jit->get_outputpos(); ds@1952: Write_RoundingTable(jit); ds@1952: ds@1952: /* Actual code generation! */ ds@1952: if (writer.outbase == NULL) ds@1952: { ds@1952: /* First Pass - find codesize and resolve relocation */ ds@1952: jitoffs_t pcode_offs; ds@1952: jitoffs_t native_offs; ds@1952: ds@1952: for (; writer.inptr < endptr;) ds@1952: { ds@1952: /* Store the native offset into the rebase memory. ds@1952: * This large chunk of memory lets us do an instant lookup ds@1952: * based on an original pcode offset. ds@1952: */ ds@1952: pcode_offs = (jitoffs_t)((uint8_t *)writer.inptr - code); ds@1952: native_offs = jit->get_outputpos(); ds@1952: *((jitoffs_t *)(data->rebase + pcode_offs)) = native_offs; ds@1952: ds@1952: /* Now read the opcode and continue. */ ds@1952: op = (OPCODE)writer.read_cell(); ds@1952: ds@1952: /* Patch the floating point natives with our opcodes */ ds@1952: if (op == OP_SYSREQ_N) ds@1952: { ds@1952: cell_t idx = writer.read_cell(); ds@1952: if (data->jit_float_table[idx].found) ds@1952: { ds@1952: writer.inptr -= 2; ds@1952: *(writer.inptr++) = data->jit_float_table[idx].index; ds@1952: *(writer.inptr++) = OP_NOP; ds@1952: *(writer.inptr++) = OP_NOP; ds@1952: op = (OPCODE)data->jit_float_table[idx].index; dvander@2093: } dvander@2093: else dvander@2093: { ds@1952: writer.inptr--; ds@1952: } ds@1952: } ds@1952: switch (op) ds@1952: { ds@1952: #include "opcode_switch.inc" ds@1952: } ds@1952: /* Check for errors. This should only happen in the first pass. */ ds@1952: if (data->error_set != SP_ERROR_NONE) ds@1952: { ds@1952: *err = data->error_set; dvander@2193: co->Abort(); dvander@2193: return false; ds@1952: } ds@1952: } ds@1952: /* Write these last because error jumps should be unpredicted, and thus forward */ ds@1952: WriteErrorRoutines(data, jit); ds@1952: ds@1952: /* Write the final CIP to the last position in the reloc array */ ds@1952: pcode_offs = (jitoffs_t)((uint8_t *)writer.inptr - code); ds@1952: native_offs = jit->get_outputpos(); ds@1952: *((jitoffs_t *)(data->rebase + pcode_offs)) = native_offs; ds@1952: ds@1952: /* the total codesize is now known! */ ds@1952: codemem = writer.get_outputpos(); ds@1952: writer.outbase = (jitcode_t)engine->AllocatePageMemory(codemem); ds@1952: engine->SetReadWrite(writer.outbase); ds@1952: writer.outptr = writer.outbase; ds@1952: /* go back for third pass */ ds@1952: goto jit_rewind; dvander@2093: } dvander@2093: else dvander@2093: { ds@1952: /******* ds@1952: * THIRD PASS - write opcode info ds@1952: *******/ ds@1952: for (; writer.inptr < endptr;) ds@1952: { ds@1952: op = (OPCODE)writer.read_cell(); ds@1952: switch (op) ds@1952: { ds@1952: #include "opcode_switch.inc" ds@1952: } ds@1952: } ds@1952: /* Write these last because error jumps should be unpredicted, and thus forward */ ds@1952: WriteErrorRoutines(data, jit); ds@1952: ds@1952: engine->SetReadExecute(writer.outbase); ds@1952: } ds@1952: ds@1952: /************* ds@1952: * FOURTH PASS - Context Setup ds@1952: *************/ ds@1952: ds@1952: /* setup basics */ dvander@2193: sp_context_t *ctx = data->runtime->GetBaseContext()->GetCtx(); dvander@2193: dvander@2193: /* Clear out any old cruft */ dvander@2193: if (plugin->codebase != NULL) dvander@2193: { dvander@2193: FreePluginVars(data->runtime->m_pPlugin); dvander@2193: FreeContextVars(ctx); dvander@2193: } dvander@2193: dvander@2193: plugin->codebase = writer.outbase; dvander@2193: plugin->jit_codesize = codemem; dvander@2193: plugin->jit_memsize = 0; ds@1952: ds@1952: /* setup memory */ dvander@2193: dvander@2193: ctx->hp = plugin->data_size; dvander@2193: ctx->sp = plugin->mem_size - sizeof(cell_t); dvander@2193: ctx->frm = ctx->sp; dvander@2193: ctx->n_err = SP_ERROR_NONE; dvander@2193: ctx->n_idx = SP_ERROR_NONE; dvander@2193: plugin->prof_flags = data->profile; dvander@2193: plugin->flags = data->debug ? SPFLAG_PLUGIN_DEBUG : 0; ds@1952: ds@1952: const char *strbase = plugin->info.stringbase; ds@1952: uint32_t max, iter; ds@1952: ds@1952: /* relocate public info */ ds@1952: if ((max = plugin->info.publics_num)) ds@1952: { dvander@2193: plugin->publics = new sp_public_t[max]; dvander@2193: plugin->jit_memsize += sizeof(sp_public_t) * max; ds@1952: for (iter=0; iterpublics[iter].name = strbase + plugin->info.publics[iter].name; dvander@2193: plugin->publics[iter].code_offs = RelocLookup(jit, plugin->info.publics[iter].address, false); ds@1952: /* Encode the ID as a straight code offset */ dvander@2193: plugin->publics[iter].funcid = (plugin->publics[iter].code_offs << 1); ds@1952: } ds@1952: } ds@1952: ds@1952: /* relocate pubvar info */ ds@1952: if ((max = plugin->info.pubvars_num)) ds@1952: { dvander@2193: uint8_t *dat = plugin->memory; dvander@2193: plugin->pubvars = new sp_pubvar_t[max]; dvander@2193: plugin->jit_memsize += sizeof(sp_pubvar_t) * max; ds@1952: for (iter=0; iterpubvars[iter].name = strbase + plugin->info.pubvars[iter].name; dvander@2193: plugin->pubvars[iter].offs = (cell_t *)(dat + plugin->info.pubvars[iter].address); ds@1952: } ds@1952: } ds@1952: ds@1952: /* relocate native info */ ds@1952: if ((max = plugin->info.natives_num)) ds@1952: { dvander@2193: plugin->natives = new sp_native_t[max]; dvander@2193: plugin->jit_memsize += sizeof(sp_native_t) * max; ds@1952: for (iter=0; iternatives[iter].name = strbase + plugin->info.natives[iter].name; dvander@2193: plugin->natives[iter].pfn = &InvalidNative; dvander@2193: plugin->natives[iter].status = SP_NATIVE_UNBOUND; dvander@2193: plugin->natives[iter].flags = 0; dvander@2193: plugin->natives[iter].user = NULL; ds@1952: } ds@1952: } ds@1952: ds@1952: /** ds@1952: * If we're debugging, make sure we copy the necessary info. ds@1952: */ ds@1952: if (data->debug) ds@1952: { ds@1952: strbase = plugin->debug.stringbase; ds@1952: ds@1952: /* relocate files */ ds@1952: max = plugin->debug.files_num; dvander@2193: plugin->files = new sp_debug_file_t[max]; dvander@2193: plugin->jit_memsize += sizeof(sp_debug_file_t) * max; ds@1952: for (iter=0; iterfiles[iter].addr = RelocLookup(jit, plugin->debug.files[iter].addr, false); dvander@2193: plugin->files[iter].name = strbase + plugin->debug.files[iter].name; ds@1952: } ds@1952: ds@1952: /* relocate lines */ ds@1952: max = plugin->debug.lines_num; dvander@2193: plugin->lines = new sp_debug_line_t[max]; dvander@2193: plugin->jit_memsize += sizeof(sp_debug_line_t) * max; ds@1952: for (iter=0; iterlines[iter].addr = RelocLookup(jit, plugin->debug.lines[iter].addr, false); dvander@2193: plugin->lines[iter].line = plugin->debug.lines[iter].line; ds@1952: } ds@1952: ds@1952: /* relocate arrays */ ds@1952: sp_fdbg_symbol_t *sym; ds@1952: sp_fdbg_arraydim_t *arr; ds@1952: uint8_t *cursor = (uint8_t *)(plugin->debug.symbols); ds@1952: ds@1952: max = plugin->debug.syms_num; dvander@2193: plugin->symbols = new sp_debug_symbol_t[max]; dvander@2193: plugin->jit_memsize += sizeof(sp_debug_symbol_t) * max; ds@1952: for (iter=0; itercodestart > data->codesize) ds@1952: { dvander@2193: plugin->symbols[iter].codestart = 0; ds@1952: } else { dvander@2193: plugin->symbols[iter].codestart = RelocLookup(jit, sym->codestart, false); ds@1952: } ds@1952: if (sym->codeend > data->codesize) ds@1952: { dvander@2193: plugin->symbols[iter].codeend = data->codesize; ds@1952: } else { dvander@2193: plugin->symbols[iter].codeend = RelocLookup(jit, sym->codeend, false); ds@1952: } dvander@2193: plugin->symbols[iter].name = strbase + sym->name; dvander@2193: plugin->symbols[iter].sym = sym; ds@1952: ds@1952: if (sym->dimcount > 0) ds@1952: { ds@1952: cursor += sizeof(sp_fdbg_symbol_t); ds@1952: arr = (sp_fdbg_arraydim_t *)cursor; dvander@2193: plugin->symbols[iter].dims = arr; ds@1952: cursor += sizeof(sp_fdbg_arraydim_t) * sym->dimcount; ds@1952: continue; ds@1952: } ds@1952: dvander@2193: plugin->symbols[iter].dims = NULL; ds@1952: cursor += sizeof(sp_fdbg_symbol_t); ds@1952: } ds@1952: } ds@1952: ds@1952: tracker_t *trk = new tracker_t; ds@1952: ctx->vm[JITVARS_TRACKER] = trk; dvander@2193: ctx->vm[JITVARS_BASECTX] = data->runtime->GetDefaultContext(); dvander@2193: ctx->vm[JITVARS_PROFILER] = g_engine2.GetProfiler(); dvander@2193: ctx->vm[JITVARS_PLUGIN] = data->runtime->m_pPlugin; ds@1952: trk->pBase = (ucell_t *)malloc(1024); ds@1952: trk->pCur = trk->pBase; ds@1952: trk->size = 1024 / sizeof(cell_t); ds@1952: dvander@2193: plugin->jit_memsize += trk->size; ds@1952: ds@1952: /* clean up relocation+compilation memory */ dvander@2193: co->Abort(); ds@1952: ds@1952: *err = SP_ERROR_NONE; ds@1952: dvander@2193: return true; ds@1952: } ds@1952: ds@1952: SPVM_NATIVE_FUNC JITX86::CreateFakeNative(SPVM_FAKENATIVE_FUNC callback, void *pData) ds@1952: { ds@1952: JitWriter jw; ds@1952: JitWriter *jit = &jw; ds@1952: ds@1952: jw.outbase = NULL; ds@1952: jw.outptr = NULL; ds@1952: jw.data = NULL; ds@1952: ds@1952: /* First pass, calculate size */ ds@1952: rewind: ds@1952: /* Align the stack to 16 bytes */ ds@1952: //push ebx ds@1952: //push edi ds@1952: //push esi ds@1952: //mov edi, [esp+16] ;store ctx ds@1952: //mov esi, [esp+20] ;store params ds@1952: //mov ebx, esp ds@1952: //and esp, 0xFFFFFF0 ds@1952: //sub esp, 4 ds@1952: IA32_Push_Reg(jit, REG_EBX); ds@1952: IA32_Push_Reg(jit, REG_EDI); ds@1952: IA32_Push_Reg(jit, REG_ESI); ds@1952: IA32_Mov_Reg_Esp_Disp8(jit, REG_EDI, 16); ds@1952: IA32_Mov_Reg_Esp_Disp8(jit, REG_ESI, 20); ds@1952: IA32_Mov_Reg_Rm(jit, REG_EBX, REG_ESP, MOD_REG); ds@1952: IA32_And_Rm_Imm8(jit, REG_ESP, MOD_REG, -16); ds@1952: IA32_Sub_Rm_Imm8(jit, REG_ESP, 4, MOD_REG); ds@1952: ds@1952: //push pData ;push pData ds@1952: //push esi ;push params ds@1952: //push edi ;push ctx ds@1952: //call [callback] ;invoke the meta-callback ds@1952: //mov esp, ebx ;restore the stack ds@1952: //pop esi ;restore esi ds@1952: //pop edi ;restore edi ds@1952: //pop ebx ;restore ebx ds@1952: //ret ;return ds@1952: IA32_Push_Imm32(jit, (jit_int32_t)pData); ds@1952: IA32_Push_Reg(jit, REG_ESI); ds@1952: IA32_Push_Reg(jit, REG_EDI); ds@1952: uint32_t call = IA32_Call_Imm32(jit, 0); ds@1952: IA32_Write_Jump32_Abs(jit, call, (void *)callback); ds@1952: IA32_Mov_Reg_Rm(jit, REG_ESP, REG_EBX, MOD_REG); ds@1952: IA32_Pop_Reg(jit, REG_ESI); ds@1952: IA32_Pop_Reg(jit, REG_EDI); ds@1952: IA32_Pop_Reg(jit, REG_EBX); ds@1952: IA32_Return(jit); ds@1952: ds@1952: if (jw.outbase == NULL) ds@1952: { ds@1952: /* Second pass: Actually write */ ds@1952: jw.outbase = (jitcode_t)engine->AllocatePageMemory(jw.get_outputpos()); ds@1952: if (!jw.outbase) ds@1952: { ds@1952: return NULL; ds@1952: } ds@1952: engine->SetReadWrite(jw.outbase); ds@1952: jw.outptr = jw.outbase; ds@1952: ds@1952: goto rewind; ds@1952: } ds@1952: ds@1952: engine->SetReadExecute(jw.outbase); ds@1952: ds@1952: return (SPVM_NATIVE_FUNC)jw.outbase; ds@1952: } ds@1952: ds@1952: void JITX86::DestroyFakeNative(SPVM_NATIVE_FUNC func) ds@1952: { ds@1952: engine->FreePageMemory((void *)func); ds@1952: } ds@1952: dvander@2193: int JITX86::ContextExecute(sp_plugin_t *pl, sp_context_t *ctx, uint32_t code_idx, cell_t *result) ds@1952: { ds@1952: typedef int (*CONTEXT_EXECUTE)(sp_context_t *, uint32_t, cell_t *); dvander@2193: CONTEXT_EXECUTE fn = (CONTEXT_EXECUTE)pl->codebase; ds@1952: return fn(ctx, code_idx, result); ds@1952: } ds@1952: dvander@2193: ICompilation *JITX86::StartCompilation() ds@1952: { ds@1952: CompData *data = new CompData; dvander@2193: dvander@2193: data->jit_float_table = NULL; dvander@2193: dvander@2193: return data; dvander@2193: } dvander@2193: dvander@2193: void CompData::SetRuntime(BaseRuntime *runtime) dvander@2193: { dvander@2193: plugin = runtime->m_pPlugin; dvander@2193: ds@1952: uint32_t max_natives = plugin->info.natives_num; ds@1952: const char *strbase = plugin->info.stringbase; ds@1952: dvander@2193: this->runtime = runtime; dvander@2193: dvander@2193: inline_level = JIT_INLINE_ERRORCHECKS|JIT_INLINE_NATIVES; dvander@2193: error_set = SP_ERROR_NONE; dvander@2193: dvander@2193: jit_float_table = new floattbl_t[max_natives]; ds@1952: for (uint32_t i=0; iinfo.natives[i].name; ds@1952: if (!strcmp(name, "FloatAbs")) ds@1952: { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_FABS; ds@1952: } else if (!strcmp(name, "FloatAdd")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_FLOATADD; ds@1952: } else if (!strcmp(name, "FloatSub")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_FLOATSUB; ds@1952: } else if (!strcmp(name, "FloatMul")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_FLOATMUL; ds@1952: } else if (!strcmp(name, "FloatDiv")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_FLOATDIV; ds@1952: } else if (!strcmp(name, "float")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_FLOAT; ds@1952: } else if (!strcmp(name, "FloatCompare")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_FLOATCMP; ds@1952: } else if (!strcmp(name, "RoundToZero")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_RND_TO_ZERO; ds@1952: } else if (!strcmp(name, "RoundToCeil")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_RND_TO_CEIL; ds@1952: } else if (!strcmp(name, "RoundToFloor")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_RND_TO_FLOOR; ds@1952: } else if (!strcmp(name, "RoundToNearest")) { dvander@2193: jit_float_table[i].found = true; dvander@2193: jit_float_table[i].index = OP_RND_TO_NEAREST; ds@1952: } ds@1952: } dvander@2193: } dvander@2193: dvander@2193: ICompilation *JITX86::StartCompilation(BaseRuntime *runtime) dvander@2193: { dvander@2193: CompData *data = new CompData; dvander@2193: dvander@2193: data->SetRuntime(runtime); ds@1952: ds@1952: return data; ds@1952: } ds@1952: dvander@2193: void CompData::Abort() ds@1952: { dvander@2193: if (rebase) ds@1952: { dvander@2193: engine->BaseFree(rebase); ds@1952: } dvander@2193: delete [] jit_float_table; dvander@2193: delete this; dvander@2193: } dvander@2193: dvander@2193: void JITX86::FreeContextVars(sp_context_t *ctx) dvander@2193: { dvander@2193: free(((tracker_t *)(ctx->vm[JITVARS_TRACKER]))->pBase); dvander@2193: delete (tracker_t *)ctx->vm[JITVARS_TRACKER]; ds@1952: } ds@1952: dvander@2193: void JITX86::FreePluginVars(sp_plugin_t *pl) ds@1952: { dvander@2193: delete [] pl->files; dvander@2193: delete [] pl->lines; dvander@2193: delete [] pl->natives; dvander@2193: delete [] pl->publics; dvander@2193: delete [] pl->pubvars; dvander@2193: delete [] pl->symbols; dvander@2193: dvander@2193: if (pl->codebase != NULL) dvander@2193: { dvander@2193: g_engine1.FreePageMemory(pl->codebase); dvander@2193: pl->codebase = NULL; dvander@2193: } dvander@2193: dvander@2193: pl->files = NULL; dvander@2193: pl->lines = NULL; dvander@2193: pl->natives = NULL; dvander@2193: pl->publics = NULL; dvander@2193: pl->pubvars = NULL; dvander@2193: pl->symbols = NULL; dvander@2193: } dvander@2193: dvander@2193: bool CompData::SetOption(const char *key, const char *val) dvander@2193: { ds@1952: if (strcmp(key, SP_JITCONF_DEBUG) == 0) ds@1952: { ds@1952: if ((atoi(val) == 1) || !strcmp(val, "yes")) ds@1952: { dvander@2193: debug = true; ds@1952: } else { dvander@2193: debug = false; ds@1952: } dvander@2193: if (debug && plugin && !(plugin->flags & SP_FLAG_DEBUG)) ds@1952: { dvander@2193: debug = false; ds@1952: return false; ds@1952: } ds@1952: return true; ds@1952: } ds@1952: else if (strcmp(key, SP_JITCONF_PROFILE) == 0) ds@1952: { dvander@2193: profile = atoi(val); ds@1952: ds@1952: /** Callbacks must be profiled to profile functions! */ dvander@2193: if ((profile & SP_PROF_FUNCTIONS) == SP_PROF_FUNCTIONS) ds@1952: { dvander@2193: profile |= SP_PROF_CALLBACKS; ds@1952: } ds@1952: ds@1952: return true; ds@1952: } ds@1952: ds@1952: return false; ds@1952: } ds@1952: