1.1 --- a/sourcepawn/include/sp_vm_api.h Sat Sep 23 23:37:40 2006 +0000
1.2 +++ b/sourcepawn/include/sp_vm_api.h Sun Sep 24 06:17:10 2006 +0000
1.3 @@ -59,7 +59,7 @@
1.4 virtual void FreeBaseContext(IPluginContext *ctx) =0;
1.5
1.6 /**
1.7 - * Allocates memory.
1.8 + * Allocates large blocks of temporary memory.
1.9 *
1.10 * @param size Size of memory to allocate.
1.11 * @return Pointer to memory, NULL if allocation failed.
1.12 @@ -72,6 +72,21 @@
1.13 * @param mem Memory address to free.
1.14 */
1.15 virtual void BaseFree(void *memory) =0;
1.16 +
1.17 + /**
1.18 + * Allocates executable memory.
1.19 + *
1.20 + * @param size Size of memory to allocate.
1.21 + * @return Pointer to memory, NULL if allocation failed.
1.22 + */
1.23 + virtual void *ExecAlloc(size_t size) =0;
1.24 +
1.25 + /**
1.26 + * Frees executable memory.
1.27 + *
1.28 + * @param mem Address to free.
1.29 + */
1.30 + virtual void ExecFree(void *address) =0;
1.31 };
1.32
1.33 class ICompilation
1.34 @@ -107,14 +122,14 @@
1.35 virtual bool SetCompilationOption(ICompilation *co, const char *key, const char *val) =0;
1.36
1.37 /**
1.38 - * Finalizes a compilation into a new IContext.
1.39 + * Finalizes a compilation into a new sp_context_t.
1.40 * Note: This will free the ICompilation pointer.
1.41 *
1.42 * @param co Compilation pointer.
1.43 * @param err Filled with error code on exit.
1.44 * @return New plugin context.
1.45 */
1.46 - virtual IPluginContext *CompileToContext(ICompilation *co, int *err) =0;
1.47 + virtual sp_context_t *CompileToContext(ICompilation *co, int *err) =0;
1.48
1.49 /**
1.50 * Aborts a compilation and frees the ICompilation pointer.
1.51 @@ -128,7 +143,7 @@
1.52 *
1.53 * @param ctx Context structure pointer.
1.54 */
1.55 - virtual void FreeContextVars(sp_context_t *ctx) =0;
1.56 + virtual void FreeContext(sp_context_t *ctx) =0;
1.57
1.58 /**
1.59 * Calls the "execute" function on a context.
2.1 --- a/sourcepawn/include/sp_vm_types.h Sat Sep 23 23:37:40 2006 +0000
2.2 +++ b/sourcepawn/include/sp_vm_types.h Sun Sep 24 06:17:10 2006 +0000
2.3 @@ -201,7 +201,7 @@
2.4 typedef struct sp_context_s
2.5 {
2.6 /* general/parent information */
2.7 - void *base; /* base of generated code and memory */
2.8 + void *codebase; /* base of generated code and memory */
2.9 sp_plugin_t *plugin; /* pointer back to parent information */
2.10 SourcePawn::IPluginContext *context; /* pointer to IPluginContext */
2.11 SourcePawn::IVirtualMachine *vmbase; /* pointer to IVirtualMachine */
3.1 --- a/sourcepawn/vm/jit/x86/jit_x86.cpp Sat Sep 23 23:37:40 2006 +0000
3.2 +++ b/sourcepawn/vm/jit/x86/jit_x86.cpp Sun Sep 24 06:17:10 2006 +0000
3.3 @@ -5,6 +5,10 @@
3.4 #include "opcode_helpers.h"
3.5 #include "x86_macros.h"
3.6
3.7 +#if defined USE_UNGEN_OPCODES
3.8 +#include "ungen_opcodes.h"
3.9 +#endif
3.10 +
3.11 inline void WriteOp_Move_Pri(JitWriter *jit)
3.12 {
3.13 //mov eax, edx
3.14 @@ -231,6 +235,27 @@
3.15 IA32_Sub_Rm_Reg(jit, AMX_INFO_FRM, AMX_REG_DAT, MOD_MEM_REG);
3.16 }
3.17
3.18 +inline void WriteOp_Lidx_B(JitWriter *jit)
3.19 +{
3.20 + cell_t val = jit->read_cell();
3.21 + //shl eax, <val>
3.22 + //add eax, edx
3.23 + //mov eax, [edi+eax]
3.24 + IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG);
3.25 + IA32_Add_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.26 + Write_Check_VerifyAddr(jit, AMX_REG_PRI, false);
3.27 + IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.28 +}
3.29 +
3.30 +inline void WriteOp_Idxaddr_B(JitWriter *jit)
3.31 +{
3.32 + //shl eax, <val>
3.33 + //add eax, edx
3.34 + cell_t val = jit->read_cell();
3.35 + IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG);
3.36 + IA32_Add_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.37 +}
3.38 +
3.39 inline void WriteOp_Shl(JitWriter *jit)
3.40 {
3.41 //mov ecx, edx
3.42 @@ -293,18 +318,6 @@
3.43 IA32_Mov_Rm_Reg(jit, AMX_REG_ALT, AMX_REG_TMP, MOD_REG);
3.44 }
3.45
3.46 -#ifdef UNSUPPORTED
3.47 -inline void WriteOp_UMul(JitWriter *jit)
3.48 -{
3.49 - //mov ecx, edx
3.50 - //mul edx
3.51 - //mov edx, ecx
3.52 - IA32_Mov_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
3.53 - IA32_Mul_Rm(jit, AMX_REG_ALT, MOD_REG);
3.54 - IA32_Mov_Rm_Reg(jit, AMX_REG_ALT, AMX_REG_TMP, MOD_REG);
3.55 -}
3.56 -#endif
3.57 -
3.58 inline void WriteOp_Not(JitWriter *jit)
3.59 {
3.60 //test eax, eax
3.61 @@ -401,54 +414,6 @@
3.62 IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_NE);
3.63 }
3.64
3.65 -#ifdef UNSUPPORTED
3.66 -inline void WriteOp_Less(JitWriter *jit)
3.67 -{
3.68 - //cmp eax, edx ; PRI < ALT ? (unsigned)
3.69 - //mov eax, 0
3.70 - //setb al
3.71 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.72 - IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
3.73 - IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_B);
3.74 -}
3.75 -#endif
3.76 -
3.77 -#ifdef UNSUPPORTED
3.78 -inline void WriteOp_Leq(JitWriter *jit)
3.79 -{
3.80 - //cmp eax, edx ; PRI <= ALT ? (unsigned)
3.81 - //mov eax, 0
3.82 - //setbe al
3.83 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.84 - IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
3.85 - IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_BE);
3.86 -}
3.87 -#endif
3.88 -
3.89 -#ifdef UNSUPPORTED
3.90 -inline void WriteOp_Grtr(JitWriter *jit)
3.91 -{
3.92 - //cmp eax, edx ; PRI > ALT ? (unsigned)
3.93 - //mov eax, 0
3.94 - //seta al
3.95 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.96 - IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
3.97 - IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_A);
3.98 -}
3.99 -#endif
3.100 -
3.101 -#ifdef UNSUPPORTED
3.102 -inline void WriteOp_Geq(JitWriter *jit)
3.103 -{
3.104 - //cmp eax, edx ; PRI >= ALT ? (unsigned)
3.105 - //mov eax, 0
3.106 - //setae al
3.107 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.108 - IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
3.109 - IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_AE);
3.110 -}
3.111 -#endif
3.112 -
3.113 inline void WriteOp_Sless(JitWriter *jit)
3.114 {
3.115 //cmp eax, edx ; PRI < ALT ? (signed)
3.116 @@ -633,7 +598,6 @@
3.117 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_FRM, val);
3.118 }
3.119
3.120 -#ifdef UNSUPPORTED
3.121 inline void WriteOp_Lref_Pri(JitWriter *jit)
3.122 {
3.123 //mov eax, [edi+<val>]
3.124 @@ -645,9 +609,7 @@
3.125 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_DAT, val);
3.126 IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.127 }
3.128 -#endif
3.129
3.130 -#ifdef UNSUPPORTED
3.131 inline void WriteOp_Lref_Alt(JitWriter *jit)
3.132 {
3.133 //mov edx, [edi+<val>]
3.134 @@ -659,9 +621,7 @@
3.135 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_DAT, val);
3.136 IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_ALT, AMX_REG_DAT, AMX_REG_ALT, NOSCALE);
3.137 }
3.138 -#endif
3.139
3.140 -#ifdef UNSUPPORTED
3.141 inline void WriteOp_Lref_S_Pri(JitWriter *jit)
3.142 {
3.143 //mov eax, [ebx+<val>]
3.144 @@ -673,9 +633,7 @@
3.145 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_PRI, AMX_REG_FRM, val);
3.146 IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.147 }
3.148 -#endif
3.149
3.150 -#ifdef UNSUPPORTED
3.151 inline void WriteOp_Lref_S_Alt(JitWriter *jit)
3.152 {
3.153 //mov edx, [ebx+<val>]
3.154 @@ -687,7 +645,6 @@
3.155 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_ALT, AMX_REG_FRM, val);
3.156 IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_ALT, AMX_REG_DAT, AMX_REG_ALT, NOSCALE);
3.157 }
3.158 -#endif
3.159
3.160 inline void WriteOp_Const_Pri(JitWriter *jit)
3.161 {
3.162 @@ -773,18 +730,6 @@
3.163 IA32_Lea_Reg_DispRegMult(jit, AMX_REG_PRI, AMX_REG_ALT, AMX_REG_PRI, SCALE4);
3.164 }
3.165
3.166 -#ifdef UNSUPPORTED
3.167 -inline void WriteOp_Idxaddr_B(JitWriter *jit)
3.168 -{
3.169 - //shl eax, <val>
3.170 - //add eax, edx
3.171 - cell_t val = jit->read_cell();
3.172 - IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG);
3.173 - IA32_Add_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.174 -}
3.175 -#endif
3.176 -
3.177 -#ifdef UNSUPPORTED
3.178 inline void WriteOp_Sref_Pri(JitWriter *jit)
3.179 {
3.180 //mov ecx, [edi+<val>]
3.181 @@ -796,9 +741,7 @@
3.182 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val);
3.183 IA32_Mov_Rm_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_PRI);
3.184 }
3.185 -#endif
3.186
3.187 -#ifdef UNSUPPORTED
3.188 inline void WriteOp_Sref_Alt(JitWriter *jit)
3.189 {
3.190 //mov ecx, [edi+<val>]
3.191 @@ -810,9 +753,7 @@
3.192 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_DAT, val);
3.193 IA32_Mov_Rm_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_ALT);
3.194 }
3.195 -#endif
3.196
3.197 -#ifdef UNSUPPORTED
3.198 inline void WriteOp_Sref_S_Pri(JitWriter *jit)
3.199 {
3.200 //mov ecx, [ebx+<val>]
3.201 @@ -824,9 +765,7 @@
3.202 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val);
3.203 IA32_Mov_Rm_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_PRI);
3.204 }
3.205 -#endif
3.206
3.207 -#ifdef UNSUPPORTED
3.208 inline void WriteOp_Sref_S_Alt(JitWriter *jit)
3.209 {
3.210 //mov ecx, [ebx+<val>]
3.211 @@ -838,31 +777,6 @@
3.212 IA32_Mov_Reg_Rm_Disp32(jit, AMX_REG_TMP, AMX_REG_FRM, val);
3.213 IA32_Mov_Rm_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, AMX_REG_ALT);
3.214 }
3.215 -#endif
3.216 -
3.217 -#ifdef UNSUPPORTED
3.218 -inline void WriteOp_Align_Pri(JitWriter *jit)
3.219 -{
3.220 - //xor eax, <cellsize - val>
3.221 - cell_t val = sizeof(cell_t) - jit->read_cell();
3.222 - if (val < SCHAR_MAX && val > SCHAR_MIN)
3.223 - IA32_Xor_Rm_Imm8(jit, AMX_REG_PRI, MOD_REG, (jit_int8_t)val);
3.224 - else
3.225 - IA32_Xor_Eax_Imm32(jit, val);
3.226 -}
3.227 -#endif
3.228 -
3.229 -#ifdef UNSUPPORTED
3.230 -inline void WriteOp_Align_Alt(JitWriter *jit)
3.231 -{
3.232 - //xor edx, <cellsize - val>
3.233 - cell_t val = sizeof(cell_t) - jit->read_cell();
3.234 - if (val < SCHAR_MAX && val > SCHAR_MIN)
3.235 - IA32_Xor_Rm_Imm8(jit, AMX_REG_ALT, MOD_REG, (jit_int8_t)val);
3.236 - else
3.237 - IA32_Xor_Rm_Imm32(jit, AMX_REG_ALT, MOD_REG, val);
3.238 -}
3.239 -#endif
3.240
3.241 inline void WriteOp_Pop_Pri(JitWriter *jit)
3.242 {
3.243 @@ -963,39 +877,6 @@
3.244 IA32_Pop_Reg(jit, REG_ESI);
3.245 }
3.246
3.247 -#ifdef UNSUPPORTED
3.248 -inline void WriteOp_Cmps(JitWriter *jit)
3.249 -{
3.250 - //push edi
3.251 - //push esi
3.252 - //lea esi, [edi+edx]
3.253 - //lea edi, [edi+eax]
3.254 - IA32_Push_Reg(jit, REG_EDI);
3.255 - IA32_Push_Reg(jit, REG_ESI);
3.256 - IA32_Lea_Reg_DispRegMult(jit, REG_ESI, AMX_REG_DAT, AMX_REG_ALT, NOSCALE);
3.257 - IA32_Lea_Reg_DispRegMult(jit, REG_EDI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.258 -
3.259 - //xor eax, eax
3.260 - //repe cmpsb
3.261 - //je :cmps1
3.262 - IA32_Xor_Rm_Reg(jit, REG_EAX, REG_EAX, MOD_REG);
3.263 - IA32_Cmpsb(jit);
3.264 - jitoffs_t jmp = IA32_Jump_Cond_Imm8(jit, CC_E, 0);
3.265 -
3.266 - //sbb eax, eax
3.267 - //sbb eax, -1
3.268 - IA32_Sbb_Rm_Reg(jit, REG_EAX, REG_EAX, MOD_REG);
3.269 - IA32_Sbb_Eax_Imm32(jit, -1);//:TODO: use imm8 here
3.270 -
3.271 - //:cmps1
3.272 - //pop esi
3.273 - //pop edi
3.274 - IA32_Send_Jump8_Here(jit, jmp);
3.275 - IA32_Pop_Reg(jit, REG_ESI);
3.276 - IA32_Pop_Reg(jit, REG_EDI);
3.277 -}
3.278 -#endif
3.279 -
3.280 inline void WriteOp_Fill(JitWriter *jit)
3.281 {
3.282 //add edi, edx
3.283 @@ -1099,32 +980,6 @@
3.284 IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.285 }
3.286
3.287 -#ifdef UNSUPPORTED
3.288 -inline void WriteOp_Lodb_I(JitWriter *jit)
3.289 -{
3.290 - Write_Check_VerifyAddr(jit, AMX_REG_PRI, false);
3.291 -
3.292 - //mov eax, [edi+eax]
3.293 - IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.294 -
3.295 - //and eax, <bitmask>
3.296 - cell_t val = jit->read_cell();
3.297 - switch(val)
3.298 - {
3.299 - case 1:
3.300 - {
3.301 - IA32_And_Rm_Imm32(jit, AMX_REG_PRI, 0x000000FF);//:TODO: replace with AND EAX, imm32
3.302 - break;
3.303 - }
3.304 - case 2:
3.305 - {
3.306 - IA32_And_Rm_Imm32(jit, AMX_REG_PRI, 0x0000FFFF);//:TODO: replace with AND EAX, imm32
3.307 - break;
3.308 - }
3.309 - }
3.310 -}
3.311 -#endif
3.312 -
3.313 inline void WriteOp_Stor_I(JitWriter *jit)
3.314 {
3.315 //mov [edi+edx], eax
3.316 @@ -1132,33 +987,6 @@
3.317 IA32_Mov_Rm_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
3.318 }
3.319
3.320 -#ifdef UNSUPPORTED
3.321 -inline void WriteOp_Strb_I(JitWriter *jit)
3.322 -{
3.323 - Write_Check_VerifyAddr(jit, AMX_REG_ALT, false);
3.324 - //mov [edi+edx], eax
3.325 - cell_t val = jit->read_cell();
3.326 - switch (val)
3.327 - {
3.328 - case 1:
3.329 - {
3.330 - IA32_Mov_Rm8_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
3.331 - break;
3.332 - }
3.333 - case 2:
3.334 - {
3.335 - IA32_Mov_Rm16_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
3.336 - break;
3.337 - }
3.338 - case 4:
3.339 - {
3.340 - IA32_Mov_Rm_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
3.341 - break;
3.342 - }
3.343 - }
3.344 -}
3.345 -#endif
3.346 -
3.347 inline void WriteOp_Lidx(JitWriter *jit)
3.348 {
3.349 //lea eax, [edx+4*eax]
3.350 @@ -1168,119 +996,6 @@
3.351 IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.352 }
3.353
3.354 -#ifdef UNSUPPORTED
3.355 -inline void WriteOp_Lidx_B(JitWriter *jit)
3.356 -{
3.357 - cell_t val = jit->read_cell();
3.358 - //shl eax, <val>
3.359 - //add eax, edx
3.360 - //mov eax, [edi+eax]
3.361 - IA32_Shl_Rm_Imm8(jit, AMX_REG_PRI, (jit_uint8_t)val, MOD_REG);
3.362 - IA32_Add_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.363 - Write_Check_VerifyAddr(jit, AMX_REG_PRI, false);
3.364 - IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.365 -}
3.366 -#endif
3.367 -
3.368 -#ifdef UNSUPPORTED
3.369 -inline void WriteOp_Lctrl(JitWriter *jit)
3.370 -{
3.371 - cell_t val = jit->read_cell();
3.372 - switch (val)
3.373 - {
3.374 - case 0:
3.375 - {
3.376 - //mov ecx, [esi+ctx]
3.377 - //mov eax, [ecx+<offs>]
3.378 - IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_CONTEXT);
3.379 - IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_TMP, offsetof(sp_context_t, base));
3.380 - break;
3.381 - }
3.382 - case 1:
3.383 - {
3.384 - //mov eax, edi
3.385 - IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_DAT, MOD_REG);
3.386 - break;
3.387 - }
3.388 - case 2:
3.389 - {
3.390 - //mov eax, [esi+hea]
3.391 - IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_INFO, AMX_INFO_HEAP);
3.392 - break;
3.393 - }
3.394 - case 3:
3.395 - {
3.396 - //mov ecx, [esi+ctx]
3.397 - //mov eax, [ecx+ctx.memory]
3.398 - IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_CONTEXT);
3.399 - IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_TMP, offsetof(sp_context_t, memory));
3.400 - break;
3.401 - }
3.402 - case 4:
3.403 - {
3.404 - //mov eax, ebp
3.405 - //sub eax, edi - unrelocate
3.406 - IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_REG);
3.407 - IA32_Sub_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, MOD_REG);
3.408 - break;
3.409 - }
3.410 - case 5:
3.411 - {
3.412 - //mov eax, [esi+frm]
3.413 - IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_INFO, AMX_INFO_FRM);
3.414 - break;
3.415 - }
3.416 - case 6:
3.417 - {
3.418 - //mov eax, [cip]
3.419 - jitoffs_t imm32 = IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
3.420 - jitoffs_t save = jit->jit_curpos();
3.421 - jit->setpos(imm32);
3.422 - jit->write_int32((uint32_t)(jit->outbase + save));
3.423 - jit->setpos(save);
3.424 - break;
3.425 - }
3.426 - }
3.427 -}
3.428 -#endif
3.429 -
3.430 -#ifdef UNSUPPORTED
3.431 -inline void WriteOp_Sctrl(JitWriter *jit)
3.432 -{
3.433 - cell_t val = jit->read_cell();
3.434 - switch (val)
3.435 - {
3.436 - case 2:
3.437 - {
3.438 - //mov [esi+hea], eax
3.439 - IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_INFO, AMX_INFO_HEAP, AMX_REG_PRI);
3.440 - break;
3.441 - }
3.442 - case 4:
3.443 - {
3.444 - //lea ebp, [edi+eax]
3.445 - IA32_Lea_Reg_DispRegMult(jit, AMX_REG_STK, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
3.446 - break;
3.447 - }
3.448 - case 5:
3.449 - {
3.450 - //mov ebx, eax - overwrite frm
3.451 - //mov frm, eax - overwrite stacked frame
3.452 - //add ebx, edi - relocate local frm //:TODO: use LEA here!!!
3.453 - IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_PRI, MOD_REG);
3.454 - IA32_Mov_Rm_Reg(jit, AMX_INFO_FRM, AMX_REG_PRI, MOD_MEM_REG);
3.455 - IA32_Add_Rm_Reg(jit, AMX_REG_FRM, AMX_REG_DAT, MOD_REG);
3.456 - break;
3.457 - }
3.458 - case 6:
3.459 - {
3.460 - IA32_Jump_Reg(jit, AMX_REG_PRI);
3.461 - break;
3.462 - }
3.463 - }
3.464 -}
3.465 -#endif
3.466 -
3.467 inline void WriteOp_Stack(JitWriter *jit)
3.468 {
3.469 //mov edx, ebp
3.470 @@ -1337,50 +1052,6 @@
3.471 IA32_IDiv_Rm(jit, AMX_REG_TMP, MOD_REG);
3.472 }
3.473
3.474 -#ifdef UNSUPPORTED
3.475 -inline void WriteOp_UDiv(JitWriter *jit)
3.476 -{
3.477 - //mov ecx, edx
3.478 - //xor edx, edx
3.479 - //div ecx
3.480 - IA32_Mov_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
3.481 - IA32_Xor_Rm_Reg(jit, AMX_REG_ALT, AMX_REG_ALT, MOD_REG);
3.482 - Write_Check_DivZero(jit, AMX_REG_TMP);
3.483 - IA32_Div_Rm(jit, AMX_REG_TMP, MOD_REG);
3.484 -}
3.485 -#endif
3.486 -
3.487 -#ifdef UNSUPPORTED
3.488 -inline void WriteOp_UDiv_Alt(JitWriter *jit)
3.489 -{
3.490 - //mov ecx, eax
3.491 - //mov eax, edx
3.492 - //xor edx, edx
3.493 - //div ecx
3.494 - IA32_Mov_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_PRI, MOD_REG);
3.495 - IA32_Mov_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.496 - IA32_Xor_Rm_Reg(jit, AMX_REG_ALT, AMX_REG_ALT, MOD_REG);
3.497 - Write_Check_DivZero(jit, AMX_REG_TMP);
3.498 - IA32_Div_Rm(jit, AMX_REG_TMP, MOD_REG);
3.499 -}
3.500 -#endif
3.501 -
3.502 -#ifdef UNSUPPORTED
3.503 -inline void WriteOp_Ret(JitWriter *jit)
3.504 -{
3.505 - //mov ebx, [ebp] - get old FRM
3.506 - //add ebp, 4 - pop stack
3.507 - //mov [esi+frm], ebx - restore
3.508 - //add ebx, edi - relocate
3.509 - //ret
3.510 - IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_STK, MOD_MEM_REG);
3.511 - IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
3.512 - IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_INFO, AMX_REG_FRM, AMX_INFO_FRM);//:TODO: this is wrong!
3.513 - IA32_Add_Rm_Reg(jit, AMX_REG_FRM, AMX_REG_DAT, MOD_REG);
3.514 - IA32_Return(jit);
3.515 -}
3.516 -#endif
3.517 -
3.518 inline void WriteOp_Retn(JitWriter *jit)
3.519 {
3.520 //mov ebx, [ebp] - get old frm
3.521 @@ -1449,21 +1120,6 @@
3.522 }
3.523 }
3.524
3.525 -#ifdef UNSUPPORTED
3.526 -inline void WriteOp_JRel(JitWriter *jit)
3.527 -{
3.528 - //jmp <offs> ;relative jump
3.529 - cell_t cip_offs = jit->read_cell();
3.530 -
3.531 - /* Note that since code size calculation has to be done in the same
3.532 - * phase as building relocation information, we cannot know the jump size
3.533 - * beforehand. Thus, we always write full 32bit jumps for safety.
3.534 - */
3.535 - jitoffs_t jmp = IA32_Jump_Imm32(jit, 0);
3.536 - IA32_Write_Jump32(jit, jmp, RelocLookup(jit, cip_offs));
3.537 -}
3.538 -#endif
3.539 -
3.540 inline void WriteOp_Jump(JitWriter *jit)
3.541 {
3.542 //jmp <offs>
3.543 @@ -1508,50 +1164,6 @@
3.544 IA32_Jump_Cond_Imm32(jit, CC_NE, RelocLookup(jit, target, false));
3.545 }
3.546
3.547 -#ifdef UNSUPPORTED
3.548 -inline void WriteOp_Jless(JitWriter *jit)
3.549 -{
3.550 - //cmp eax, edx
3.551 - //jb <target>
3.552 - cell_t target = jit->read_cell();
3.553 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.554 - IA32_Jump_Cond_Imm32(jit, CC_B, RelocLookup(jit, target, false));
3.555 -}
3.556 -#endif
3.557 -
3.558 -#ifdef UNSUPPORTED
3.559 -inline void WriteOp_Jleq(JitWriter *jit)
3.560 -{
3.561 - //cmp eax, edx
3.562 - //jbe <target>
3.563 - cell_t target = jit->read_cell();
3.564 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.565 - IA32_Jump_Cond_Imm32(jit, CC_BE, RelocLookup(jit, target, false));
3.566 -}
3.567 -#endif
3.568 -
3.569 -#ifdef UNSUPPORTED
3.570 -inline void WriteOp_Jgrtr(JitWriter *jit)
3.571 -{
3.572 - //cmp eax, edx
3.573 - //ja <target>
3.574 - cell_t target = jit->read_cell();
3.575 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.576 - IA32_Jump_Cond_Imm32(jit, CC_A, RelocLookup(jit, target, false));
3.577 -}
3.578 -#endif
3.579 -
3.580 -#ifdef UNSUPPORTED
3.581 -inline void WriteOp_Jgeq(JitWriter *jit)
3.582 -{
3.583 - //cmp eax, edx
3.584 - //jae <target>
3.585 - cell_t target = jit->read_cell();
3.586 - IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
3.587 - IA32_Jump_Cond_Imm32(jit, CC_AE, RelocLookup(jit, target, false));
3.588 -}
3.589 -#endif
3.590 -
3.591 inline void WriteOp_Jsless(JitWriter *jit)
3.592 {
3.593 //cmp eax, edx
3.594 @@ -1617,7 +1229,7 @@
3.595 }
3.596 }
3.597
3.598 -IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err)
3.599 +sp_context_t *JITX86::CompileToContext(ICompilation *co, int *err)
3.600 {
3.601 CompData *data = (CompData *)co;
3.602 sp_plugin_t *plugin = data->plugin;
3.603 @@ -1750,7 +1362,7 @@
3.604
3.605 /* the total codesize is now known! */
3.606 uint32_t mem = writer.jit_curpos();
3.607 - writer.outbase = new char[mem];
3.608 + writer.outbase = (jitcode_t)engine->ExecAlloc(mem);
3.609 writer.outptr = writer.outbase;
3.610 /* go back for third pass */
3.611 goto jit_rewind;
3.612 @@ -1768,29 +1380,31 @@
3.613 }
3.614 }
3.615
3.616 - /*******
3.617 - * Context Setup
3.618 - *******/
3.619 + /*************
3.620 + * FOURTH PASS - Context Setup
3.621 + *************/
3.622 +
3.623 sp_context_t *ctx = new sp_context_t;
3.624 memset(ctx, 0, sizeof(sp_context_t));
3.625
3.626 - ctx->base = plugin->base;
3.627 + /* setup basics */
3.628 + ctx->codebase = writer.outbase;
3.629 ctx->plugin = plugin;
3.630 - ctx->context = engine->CreateBaseContext(ctx);
3.631 ctx->vmbase = this;
3.632 ctx->flags = (data->debug ? SPFLAG_PLUGIN_DEBUG : 0);
3.633
3.634 + /* setup memory */
3.635 ctx->data = new uint8_t[plugin->memory];
3.636 memcpy(ctx->data, plugin->data, plugin->data_size);
3.637 ctx->memory = plugin->memory;
3.638 ctx->heapbase = plugin->data_size;
3.639 -
3.640 ctx->hp = ctx->heapbase;
3.641 ctx->sp = ctx->memory - sizeof(cell_t);
3.642
3.643 const char *strbase = plugin->info.stringbase;
3.644 uint32_t max, iter;
3.645
3.646 + /* relocate public info */
3.647 if ((max = plugin->info.publics_num))
3.648 {
3.649 ctx->publics = new sp_public_t[max];
3.650 @@ -1801,6 +1415,7 @@
3.651 }
3.652 }
3.653
3.654 + /* relocate pubvar info */
3.655 if ((max = plugin->info.pubvars_num))
3.656 {
3.657 uint8_t *dat = ctx->data;
3.658 @@ -1812,21 +1427,26 @@
3.659 }
3.660 }
3.661
3.662 + /* relocate native info */
3.663 if ((max = plugin->info.natives_num))
3.664 {
3.665 ctx->natives = new sp_native_t[max];
3.666 for (iter=0; iter<max; iter++)
3.667 {
3.668 ctx->natives[iter].name = strbase + plugin->info.natives[iter].name;
3.669 - //ctx->natives[iter].pfn = SP_NoExecNative; :TODO:
3.670 + ctx->natives[iter].pfn = NULL;
3.671 ctx->natives[iter].status = SP_NATIVE_NONE;
3.672 }
3.673 }
3.674
3.675 - strbase = plugin->debug.stringbase;
3.676 -
3.677 - if (plugin->flags & SP_FLAG_DEBUG)
3.678 + /**
3.679 + * If we're debugging, make sure we copy the necessary info.
3.680 + */
3.681 + if (data->debug)
3.682 {
3.683 + strbase = plugin->debug.stringbase;
3.684 +
3.685 + /* relocate files */
3.686 max = plugin->debug.files_num;
3.687 ctx->files = new sp_debug_file_t[max];
3.688 for (iter=0; iter<max; iter++)
3.689 @@ -1835,6 +1455,7 @@
3.690 ctx->files[iter].name = strbase + plugin->debug.files[iter].name;
3.691 }
3.692
3.693 + /* relocate lines */
3.694 max = plugin->debug.lines_num;
3.695 ctx->lines = new sp_debug_line_t[max];
3.696 for (iter=0; iter<max; iter++)
3.697 @@ -1843,6 +1464,7 @@
3.698 ctx->lines[iter].line = plugin->debug.lines[iter].line;
3.699 }
3.700
3.701 + /* relocate arrays */
3.702 sp_fdbg_symbol_t *sym;
3.703 sp_fdbg_arraydim_t *arr;
3.704 uint8_t *cursor = (uint8_t *)(plugin->debug.symbols);
3.705 @@ -1872,9 +1494,13 @@
3.706 }
3.707 }
3.708
3.709 + /* clean up relocation+compilation memory */
3.710 + engine->BaseFree(data->rebase);
3.711 + delete data;
3.712 +
3.713 *err = SP_ERR_NONE;
3.714
3.715 - return ctx->context;
3.716 + return ctx;
3.717 }
3.718
3.719 const char *JITX86::GetVMName()
3.720 @@ -1882,6 +1508,26 @@
3.721 return "JIT (x86)";
3.722 }
3.723
3.724 +int JITX86::ContextExecute(sp_context_t *ctx, uint32_t code_idx, cell_t *result)
3.725 +{
3.726 + typedef int (*CONTEXT_EXECUTE)(sp_context_t *, uint32_t, cell_t *);
3.727 + CONTEXT_EXECUTE fn = (CONTEXT_EXECUTE)ctx->codebase;
3.728 + return fn(ctx, code_idx, result);
3.729 +}
3.730 +
3.731 +void JITX86::FreeContext(sp_context_t *ctx)
3.732 +{
3.733 + engine->ExecFree(ctx->codebase);
3.734 + delete [] ctx->data;
3.735 + delete [] ctx->files;
3.736 + delete [] ctx->lines;
3.737 + delete [] ctx->natives;
3.738 + delete [] ctx->publics;
3.739 + delete [] ctx->pubvars;
3.740 + delete [] ctx->symbols;
3.741 + delete ctx;
3.742 +}
3.743 +
3.744 ICompilation *JITX86::StartCompilation(sp_plugin_t *plugin)
3.745 {
3.746 CompData *data = new CompData;
4.1 --- a/sourcepawn/vm/jit/x86/jit_x86.h Sat Sep 23 23:37:40 2006 +0000
4.2 +++ b/sourcepawn/vm/jit/x86/jit_x86.h Sun Sep 24 06:17:10 2006 +0000
4.3 @@ -42,9 +42,9 @@
4.4 const char *GetVMName() =0;
4.5 ICompilation *StartCompilation(sp_plugin_t *plugin);
4.6 bool SetCompilationOption(ICompilation *co, const char *key, const char *val) ;
4.7 - IPluginContext *CompileToContext(ICompilation *co, int *err);
4.8 + sp_context_t *CompileToContext(ICompilation *co, int *err);
4.9 void AbortCompilation(ICompilation *co);
4.10 - void FreeContextVars(sp_context_t *ctx);
4.11 + void FreeContext(sp_context_t *ctx);
4.12 int ContextExecute(sp_context_t *ctx, uint32_t code_idx, cell_t *result);
4.13 };
4.14
5.1 --- a/sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj Sat Sep 23 23:37:40 2006 +0000
5.2 +++ b/sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj Sun Sep 24 06:17:10 2006 +0000
5.3 @@ -214,6 +214,10 @@
5.4 >
5.5 </File>
5.6 <File
5.7 + RelativePath="..\ungen_opcodes.h"
5.8 + >
5.9 + </File>
5.10 + <File
5.11 RelativePath="..\x86_macros.h"
5.12 >
5.13 </File>
5.14 @@ -227,6 +231,10 @@
5.15 RelativePath="..\opcode_switch.inc"
5.16 >
5.17 </File>
5.18 + <File
5.19 + RelativePath="..\ungen_opcode_switch.inc"
5.20 + >
5.21 + </File>
5.22 </Filter>
5.23 <Filter
5.24 Name="SDK"
6.1 --- a/sourcepawn/vm/jit/x86/opcode_helpers.cpp Sat Sep 23 23:37:40 2006 +0000
6.2 +++ b/sourcepawn/vm/jit/x86/opcode_helpers.cpp Sun Sep 24 06:17:10 2006 +0000
6.3 @@ -6,7 +6,7 @@
6.4
6.5 int OpAdvTable[OP_NUM_OPCODES];
6.6
6.7 -jitoffs_t Write_Execute_Function(JitWriter *jit, bool never_inline)
6.8 +jitoffs_t Write_Execute_Function(JitWriter *jit)
6.9 {
6.10 /**
6.11 * The variables we're passed in:
6.12 @@ -79,7 +79,7 @@
6.13 //mov edx, [eax+<offs>] - get alt
6.14 //mov eax, [eax+<offs>] - get pri
6.15 IA32_Mov_Reg_Rm_Disp8(jit, REG_ECX, REG_EBP, 12);
6.16 - IA32_Add_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, base));
6.17 + IA32_Add_Reg_Rm_Disp8(jit, REG_ECX, REG_EAX, offsetof(sp_context_t, codebase));
6.18 IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_ALT, REG_EAX, offsetof(sp_context_t, alt));
6.19 IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, REG_EAX, offsetof(sp_context_t, pri));
6.20
6.21 @@ -503,7 +503,6 @@
6.22 OpAdvTable[OP_LREF_ALT] = sizeof(cell_t);
6.23 OpAdvTable[OP_LREF_S_PRI] = sizeof(cell_t);
6.24 OpAdvTable[OP_LREF_S_ALT] = sizeof(cell_t);
6.25 - OpAdvTable[OP_LODB_I] = sizeof(cell_t);
6.26 OpAdvTable[OP_CONST_PRI] = sizeof(cell_t);
6.27 OpAdvTable[OP_CONST_ALT] = sizeof(cell_t);
6.28 OpAdvTable[OP_ADDR_PRI] = sizeof(cell_t);
6.29 @@ -516,19 +515,13 @@
6.30 OpAdvTable[OP_SREF_ALT] = sizeof(cell_t);
6.31 OpAdvTable[OP_SREF_S_PRI] = sizeof(cell_t);
6.32 OpAdvTable[OP_SREF_S_ALT] = sizeof(cell_t);
6.33 - OpAdvTable[OP_STRB_I] = sizeof(cell_t);
6.34 OpAdvTable[OP_LIDX_B] = sizeof(cell_t);
6.35 OpAdvTable[OP_IDXADDR_B] = sizeof(cell_t);
6.36 - OpAdvTable[OP_ALIGN_PRI] = sizeof(cell_t);
6.37 - OpAdvTable[OP_ALIGN_ALT] = sizeof(cell_t);
6.38 - OpAdvTable[OP_LCTRL] = sizeof(cell_t);
6.39 - OpAdvTable[OP_SCTRL] = sizeof(cell_t);
6.40 OpAdvTable[OP_PUSH_C] = sizeof(cell_t);
6.41 OpAdvTable[OP_PUSH] = sizeof(cell_t);
6.42 OpAdvTable[OP_PUSH_S] = sizeof(cell_t);
6.43 OpAdvTable[OP_STACK] = sizeof(cell_t);
6.44 OpAdvTable[OP_HEAP] = sizeof(cell_t);
6.45 - OpAdvTable[OP_JREL] = sizeof(cell_t);
6.46 OpAdvTable[OP_SHL_C_PRI] = sizeof(cell_t);
6.47 OpAdvTable[OP_SHL_C_ALT] = sizeof(cell_t);
6.48 OpAdvTable[OP_SHR_C_PRI] = sizeof(cell_t);
6.49 @@ -544,7 +537,6 @@
6.50 OpAdvTable[OP_DEC] = sizeof(cell_t);
6.51 OpAdvTable[OP_DEC_S] = sizeof(cell_t);
6.52 OpAdvTable[OP_MOVS] = sizeof(cell_t);
6.53 - OpAdvTable[OP_CMPS] = sizeof(cell_t);
6.54 OpAdvTable[OP_FILL] = sizeof(cell_t);
6.55 OpAdvTable[OP_HALT] = sizeof(cell_t);
6.56 OpAdvTable[OP_BOUNDS] = sizeof(cell_t);
6.57 @@ -574,9 +566,6 @@
6.58 OpAdvTable[OP_SMUL] = 0;
6.59 OpAdvTable[OP_SDIV] = 0;
6.60 OpAdvTable[OP_SDIV_ALT] = 0;
6.61 - OpAdvTable[OP_UMUL] = 0;
6.62 - OpAdvTable[OP_UDIV] = 0;
6.63 - OpAdvTable[OP_UDIV_ALT] = 0;
6.64 OpAdvTable[OP_ADD] = 0;
6.65 OpAdvTable[OP_SUB] = 0;
6.66 OpAdvTable[OP_SUB_ALT] = 0;
6.67 @@ -592,10 +581,6 @@
6.68 OpAdvTable[OP_SIGN_ALT] = 0;
6.69 OpAdvTable[OP_EQ] = 0;
6.70 OpAdvTable[OP_NEQ] = 0;
6.71 - OpAdvTable[OP_LESS] = 0;
6.72 - OpAdvTable[OP_LEQ] = 0;
6.73 - OpAdvTable[OP_GRTR] = 0;
6.74 - OpAdvTable[OP_GEQ] = 0;
6.75 OpAdvTable[OP_SLESS] = 0;
6.76 OpAdvTable[OP_SLEQ] = 0;
6.77 OpAdvTable[OP_SGRTR] = 0;
6.78 @@ -622,10 +607,6 @@
6.79 OpAdvTable[OP_JNZ] = -2;
6.80 OpAdvTable[OP_JEQ] = -2;
6.81 OpAdvTable[OP_JNEQ] = -2;
6.82 - OpAdvTable[OP_JLESS] = -2;
6.83 - OpAdvTable[OP_JLEQ] = -2;
6.84 - OpAdvTable[OP_JGRTR] = -2;
6.85 - OpAdvTable[OP_JGEQ] = -2;
6.86 OpAdvTable[OP_JSLESS] = -2;
6.87 OpAdvTable[OP_JSLEQ] = -2;
6.88 OpAdvTable[OP_JSGRTR] = -2;
6.89 @@ -633,6 +614,7 @@
6.90 OpAdvTable[OP_SWITCH] = -2;
6.91
6.92 /* opcodes that are totally invalid */
6.93 + /* :TODO: make an alternate table if USE_UNGEN_OPCODES is on? */
6.94 OpAdvTable[OP_FILE] = -3;
6.95 OpAdvTable[OP_SYMBOL] = -3;
6.96 OpAdvTable[OP_LINE] = -3;
6.97 @@ -641,4 +623,24 @@
6.98 OpAdvTable[OP_SYSREQ_D] = -3;
6.99 OpAdvTable[OP_SYSREQ_ND] = -3;
6.100 OpAdvTable[OP_PUSH_R] = -3;
6.101 + OpAdvTable[OP_LODB_I] = -3;
6.102 + OpAdvTable[OP_STRB_I] = -3;
6.103 + OpAdvTable[OP_LCTRL] = -3;
6.104 + OpAdvTable[OP_SCTRL] = -3;
6.105 + OpAdvTable[OP_ALIGN_PRI] = -3;
6.106 + OpAdvTable[OP_ALIGN_ALT] = -3;
6.107 + OpAdvTable[OP_JREL] = -3;
6.108 + OpAdvTable[OP_CMPS] = -3;
6.109 + OpAdvTable[OP_UMUL] = -3;
6.110 + OpAdvTable[OP_UDIV] = -3;
6.111 + OpAdvTable[OP_UDIV_ALT] = -3;
6.112 + OpAdvTable[OP_LESS] = -3;
6.113 + OpAdvTable[OP_LEQ] = -3;
6.114 + OpAdvTable[OP_GRTR] = -3;
6.115 + OpAdvTable[OP_GEQ] = -3;
6.116 + OpAdvTable[OP_JLESS] = -3;
6.117 + OpAdvTable[OP_JLEQ] = -3;
6.118 + OpAdvTable[OP_JGRTR] = -3;
6.119 + OpAdvTable[OP_JGEQ] = -3;
6.120 +
6.121 }
7.1 --- a/sourcepawn/vm/jit/x86/opcode_helpers.h Sat Sep 23 23:37:40 2006 +0000
7.2 +++ b/sourcepawn/vm/jit/x86/opcode_helpers.h Sun Sep 24 06:17:10 2006 +0000
7.3 @@ -63,12 +63,12 @@
7.4 OP_LOAD_ALT, //DONE
7.5 OP_LOAD_S_PRI, //DONE
7.6 OP_LOAD_S_ALT, //DONE
7.7 - OP_LREF_PRI, //UNSUPPORTED
7.8 - OP_LREF_ALT, //UNSUPPORTED
7.9 - OP_LREF_S_PRI, //UNSUPPORTED
7.10 - OP_LREF_S_ALT, //UNSUPPORTED
7.11 + OP_LREF_PRI, // !GEN :TODO: we will need this for dynarrays
7.12 + OP_LREF_ALT, // !GEN :TODO: we will need this for dynarrays
7.13 + OP_LREF_S_PRI, //DONE
7.14 + OP_LREF_S_ALT, //DONE
7.15 OP_LOAD_I, //DONE
7.16 - OP_LODB_I, //UNSUPPORTED
7.17 + OP_LODB_I, // !GEN :TODO: - only used for pack access - drop support in compiler first
7.18 OP_CONST_PRI, //DONE
7.19 OP_CONST_ALT, //DONE
7.20 OP_ADDR_PRI, //DONE
7.21 @@ -77,26 +77,26 @@
7.22 OP_STOR_ALT, //DONE
7.23 OP_STOR_S_PRI, //DONE
7.24 OP_STOR_S_ALT, //DONE
7.25 - OP_SREF_PRI, //UNSUPPORTED
7.26 - OP_SREF_ALT, //UNSUPPORTED
7.27 - OP_SREF_S_PRI, //UNSUPPORTED
7.28 - OP_SREF_S_ALT, //UNSUPPORTED
7.29 + OP_SREF_PRI, //DONE
7.30 + OP_SREF_ALT, //DONE
7.31 + OP_SREF_S_PRI, // !GEN :TODO: we will need this for dynarrays
7.32 + OP_SREF_S_ALT, // !GEN :TODO: we will need this for dynarrays
7.33 OP_STOR_I, //DONE
7.34 - OP_STRB_I, //UNSUPPORTED
7.35 + OP_STRB_I, // !GEN :TODO: - only used for pack access, drop support in compiler first
7.36 OP_LIDX, //DONE
7.37 - OP_LIDX_B, //UNSUPPORTED
7.38 + OP_LIDX_B, //DONE
7.39 OP_IDXADDR, //DONE
7.40 - OP_IDXADDR_B, //UNSUPPORTED
7.41 - OP_ALIGN_PRI, //UNSUPPORTED
7.42 - OP_ALIGN_ALT, //UNSUPPORTED
7.43 - OP_LCTRL, //UNSUPPORTED
7.44 - OP_SCTRL, //UNSUPPORTED
7.45 + OP_IDXADDR_B, //DONE
7.46 + OP_ALIGN_PRI, // !GEN :TODO: - only used for pack access, drop support in compiler first
7.47 + OP_ALIGN_ALT, // !GEN :TODO: - only used for pack access, drop support in compiler first
7.48 + OP_LCTRL, // !GEN
7.49 + OP_SCTRL, // !GEN
7.50 OP_MOVE_PRI, //DONE
7.51 OP_MOVE_ALT, //DONE
7.52 OP_XCHG, //DONE
7.53 OP_PUSH_PRI, //DONE
7.54 OP_PUSH_ALT, //DONE
7.55 - OP_PUSH_R, //DEPRECATED
7.56 + OP_PUSH_R, // !GEN DEPRECATED
7.57 OP_PUSH_C, //DONE
7.58 OP_PUSH, //DONE
7.59 OP_PUSH_S, //DONE
7.60 @@ -105,20 +105,20 @@
7.61 OP_STACK, //DONE
7.62 OP_HEAP, //DONE
7.63 OP_PROC, //DONE
7.64 - OP_RET, //UNSUPPORTED
7.65 + OP_RET, // !GEN
7.66 OP_RETN, //DONE
7.67 OP_CALL,
7.68 - OP_CALL_PRI,
7.69 + OP_CALL_PRI, // !GEN
7.70 OP_JUMP, //DONE
7.71 - OP_JREL, //UNSUPPORTED
7.72 + OP_JREL, // !GEN
7.73 OP_JZER, //DONE
7.74 OP_JNZ, //DONE
7.75 OP_JEQ, //DONE
7.76 OP_JNEQ, //DONE
7.77 - OP_JLESS, //UNSUPPORTED
7.78 - OP_JLEQ, //UNSUPPORTED
7.79 - OP_JGRTR, //UNSUPPORTED
7.80 - OP_JGEQ, //UNSUPPORTED
7.81 + OP_JLESS, // !GEN
7.82 + OP_JLEQ, // !GEN
7.83 + OP_JGRTR, // !GEN
7.84 + OP_JGEQ, // !GEN
7.85 OP_JSLESS, //DONE
7.86 OP_JSLEQ, //DONE
7.87 OP_JSGRTR, //DONE
7.88 @@ -133,9 +133,9 @@
7.89 OP_SMUL, //DONE
7.90 OP_SDIV, //DONE
7.91 OP_SDIV_ALT, //DONE
7.92 - OP_UMUL, //UNSUPPORTED
7.93 - OP_UDIV, //UNSUPPORTED
7.94 - OP_UDIV_ALT, //UNSUPPORTED
7.95 + OP_UMUL, // !GEN
7.96 + OP_UDIV, // !GEN
7.97 + OP_UDIV_ALT, // !GEN
7.98 OP_ADD, //DONE
7.99 OP_SUB, //DONE
7.100 OP_SUB_ALT, //DONE
7.101 @@ -155,10 +155,10 @@
7.102 OP_SIGN_ALT, //DONE
7.103 OP_EQ, //DONE
7.104 OP_NEQ, //DONE
7.105 - OP_LESS, //UNSUPPORTED
7.106 - OP_LEQ, //UNSUPPORTED
7.107 - OP_GRTR, //UNSUPPORTED
7.108 - OP_GEQ, //UNSUPPORTED
7.109 + OP_LESS, // !GEN
7.110 + OP_LEQ, // !GEN
7.111 + OP_GRTR, // !GEN
7.112 + OP_GEQ, // !GEN
7.113 OP_SLESS, //DONE
7.114 OP_SLEQ, //DONE
7.115 OP_SGRTR, //DONE
7.116 @@ -176,17 +176,17 @@
7.117 OP_DEC_S, //DONE
7.118 OP_DEC_I, //DONE
7.119 OP_MOVS, //DONE
7.120 - OP_CMPS, //UNSUPPORTED
7.121 + OP_CMPS, // !GEN
7.122 OP_FILL, //DONE
7.123 OP_HALT, //DONE
7.124 OP_BOUNDS, //DONE
7.125 - OP_SYSREQ_PRI,
7.126 - OP_SYSREQ_C,
7.127 - OP_FILE, //DEPRECATED
7.128 - OP_LINE, //DEPRECATED
7.129 - OP_SYMBOL, //DEPRECATED
7.130 - OP_SRANGE, //DEPRECATED
7.131 - OP_JUMP_PRI,
7.132 + OP_SYSREQ_PRI, // !GEN
7.133 + OP_SYSREQ_C,
7.134 + OP_FILE, // !GEN DEPRECATED
7.135 + OP_LINE, // !GEN DEPRECATED
7.136 + OP_SYMBOL, // !GEN DEPRECATED
7.137 + OP_SRANGE, // !GEN DEPRECATED
7.138 + OP_JUMP_PRI, // !GEN
7.139 OP_SWITCH,
7.140 OP_CASETBL,
7.141 OP_SWAP_PRI, //DONE
7.142 @@ -194,7 +194,7 @@
7.143 OP_PUSH_ADR, //DONE
7.144 OP_NOP, //DONE
7.145 OP_SYSREQ_N,
7.146 - OP_SYMTAG, //DEPRECATED
7.147 + OP_SYMTAG, // !GEN DEPRECATED
7.148 OP_BREAK, //DONE
7.149 OP_PUSH2_C, //DONE
7.150 OP_PUSH2, //DONE
7.151 @@ -217,8 +217,8 @@
7.152 OP_CONST, //DONE
7.153 OP_CONST_S, //DONE
7.154 /* ----- */
7.155 - OP_SYSREQ_D, //UNSUPPORTED
7.156 - OP_SYSREQ_ND, //UNSUPPORTED
7.157 + OP_SYSREQ_D, // !GEN UNSUPPORT
7.158 + OP_SYSREQ_ND, // !GEN UNSUPPORT
7.159 /* ----- */
7.160 OP_HEAP_PRI, //DONE
7.161 OP_PUSH_HEAP_C, //DONE
8.1 --- a/sourcepawn/vm/jit/x86/opcode_switch.inc Sat Sep 23 23:37:40 2006 +0000
8.2 +++ b/sourcepawn/vm/jit/x86/opcode_switch.inc Sun Sep 24 06:17:10 2006 +0000
8.3 @@ -158,13 +158,6 @@
8.4 WriteOp_SMul(jit);
8.5 break;
8.6 }
8.7 -#ifdef UNSUPPORTED
8.8 - case OP_UMUL:
8.9 - {
8.10 - WriteOp_UMul(jit);
8.11 - break;
8.12 - }
8.13 -#endif
8.14 case OP_ADD:
8.15 {
8.16 WriteOp_Add(jit);
8.17 @@ -245,34 +238,6 @@
8.18 WriteOp_Neq(jit);
8.19 break;
8.20 }
8.21 -#ifdef UNSUPPORTED
8.22 - case OP_LESS:
8.23 - {
8.24 - WriteOp_Less(jit);
8.25 - break;
8.26 - }
8.27 -#endif
8.28 -#ifdef UNSUPPORTED
8.29 - case OP_LEQ:
8.30 - {
8.31 - WriteOp_Leq(jit);
8.32 - break;
8.33 - }
8.34 -#endif
8.35 -#ifdef UNSUPPORTED
8.36 - case OP_GRTR:
8.37 - {
8.38 - WriteOp_Grtr(jit);
8.39 - break;
8.40 - }
8.41 -#endif
8.42 -#ifdef UNSUPPORTED
8.43 - case OP_GEQ:
8.44 - {
8.45 - WriteOp_Geq(jit);
8.46 - break;
8.47 - }
8.48 -#endif
8.49 case OP_SLESS:
8.50 {
8.51 WriteOp_Sless(jit);
8.52 @@ -373,34 +338,26 @@
8.53 WriteOp_Load_S_Alt(jit);
8.54 break;
8.55 }
8.56 -#ifdef UNSUPPORTED
8.57 case OP_LREF_PRI:
8.58 {
8.59 WriteOp_Lref_Pri(jit);
8.60 break;
8.61 }
8.62 -#endif
8.63 -#ifdef UNSUPPORTED
8.64 case OP_LREF_ALT:
8.65 {
8.66 WriteOp_Lref_Alt(jit);
8.67 break;
8.68 }
8.69 -#endif
8.70 -#ifdef UNSUPPORTED
8.71 case OP_LREF_S_PRI:
8.72 {
8.73 WriteOp_Lref_Pri(jit);
8.74 break;
8.75 }
8.76 -#endif
8.77 -#ifdef UNSUPPORTED
8.78 case OP_LREF_S_ALT:
8.79 {
8.80 WriteOp_Lref_Alt(jit);
8.81 break;
8.82 }
8.83 -#endif
8.84 case OP_CONST_PRI:
8.85 {
8.86 WriteOp_Const_Pri(jit);
8.87 @@ -446,48 +403,26 @@
8.88 WriteOp_Idxaddr(jit);
8.89 break;
8.90 }
8.91 -#ifdef UNSUPPORTED
8.92 case OP_SREF_PRI:
8.93 {
8.94 WriteOp_Sref_Pri(jit);
8.95 break;
8.96 }
8.97 -#endif
8.98 -#ifdef UNSUPPORTED
8.99 case OP_SREF_ALT:
8.100 {
8.101 WriteOp_Sref_Alt(jit);
8.102 break;
8.103 }
8.104 -#endif
8.105 -#ifdef UNSUPPORTED
8.106 case OP_SREF_S_PRI:
8.107 {
8.108 WriteOp_Sref_S_Pri(jit);
8.109 break;
8.110 }
8.111 -#endif
8.112 -#ifdef UNSUPPORTED
8.113 case OP_SREF_S_ALT:
8.114 {
8.115 WriteOp_Sref_S_Alt(jit);
8.116 break;
8.117 }
8.118 -#endif
8.119 -#ifdef UNSUPPORTED
8.120 - case OP_ALIGN_PRI:
8.121 - {
8.122 - WriteOp_Align_Pri(jit);
8.123 - break;
8.124 - }
8.125 -#endif
8.126 -#ifdef UNSUPPORTED
8.127 - case OP_ALIGN_ALT:
8.128 - {
8.129 - WriteOp_Align_Alt(jit);
8.130 - break;
8.131 - }
8.132 -#endif
8.133 case OP_POP_PRI:
8.134 {
8.135 WriteOp_Pop_Pri(jit);
8.136 @@ -588,58 +523,26 @@
8.137 WriteOp_Load_I(jit);
8.138 break;
8.139 }
8.140 -#ifdef UNSUPPORTED
8.141 - case OP_LODB_I:
8.142 - {
8.143 - WriteOp_Lodb_I(jit);
8.144 - break;
8.145 - }
8.146 -#endif
8.147 case OP_STOR_I:
8.148 {
8.149 WriteOp_Stor_I(jit);
8.150 break;
8.151 }
8.152 -#ifdef UNSUPPORTED
8.153 - case OP_STRB_I:
8.154 - {
8.155 - WriteOp_Strb_I(jit);
8.156 - break;
8.157 - }
8.158 -#endif
8.159 case OP_LIDX:
8.160 {
8.161 WriteOp_Lidx(jit);
8.162 break;
8.163 }
8.164 -#ifdef UNSUPPORTED
8.165 case OP_LIDX_B:
8.166 {
8.167 WriteOp_Lidx_B(jit);
8.168 break;
8.169 }
8.170 -#endif
8.171 -#ifdef UNSUPPORTED
8.172 case OP_IDXADDR_B:
8.173 {
8.174 WriteOp_Idxaddr_B(jit);
8.175 break;
8.176 }
8.177 -#endif
8.178 -#ifdef UNSUPPORTED
8.179 - case OP_LCTRL:
8.180 - {
8.181 - WriteOp_Lctrl(jit);
8.182 - break;
8.183 - }
8.184 -#endif
8.185 -#ifdef UNSUPPORTED
8.186 - case OP_SCTRL:
8.187 - {
8.188 - WriteOp_Sctrl(jit);
8.189 - break;
8.190 - }
8.191 -#endif
8.192 case OP_STACK:
8.193 {
8.194 WriteOp_Stack(jit);
8.195 @@ -660,39 +563,11 @@
8.196 WriteOp_SDiv_Alt(jit);
8.197 break;
8.198 }
8.199 -#ifdef UNSUPPORTED
8.200 - case OP_UDIV:
8.201 - {
8.202 - WriteOp_UDiv(jit);
8.203 - break;
8.204 - }
8.205 -#endif
8.206 -#ifdef UNSUPPORTED
8.207 - case OP_UDIV_ALT:
8.208 - {
8.209 - WriteOp_UDiv_Alt(jit);
8.210 - break;
8.211 - }
8.212 -#endif
8.213 -#ifdef UNSUPPORTED
8.214 - case OP_RET:
8.215 - {
8.216 - WriteOp_Ret(jit);
8.217 - break;
8.218 - }
8.219 -#endif
8.220 case OP_RETN:
8.221 {
8.222 WriteOp_Retn(jit);
8.223 break;
8.224 }
8.225 -#ifdef UNSUPPORTED
8.226 - case OP_CMPS:
8.227 - {
8.228 - WriteOp_Cmps(jit);
8.229 - break;
8.230 - }
8.231 -#endif
8.232 case OP_BOUNDS:
8.233 {
8.234 WriteOp_Bounds(jit);
8.235 @@ -708,13 +583,6 @@
8.236 WriteOp_Break(jit);
8.237 break;
8.238 }
8.239 -#ifdef UNSUPPORTED
8.240 - case OP_JREL:
8.241 - {
8.242 - WriteOp_JRel(jit);
8.243 - break;
8.244 - }
8.245 -#endif
8.246 case OP_JUMP:
8.247 {
8.248 WriteOp_Jump(jit);
8.249 @@ -740,34 +608,6 @@
8.250 WriteOp_Jneq(jit);
8.251 break;
8.252 }
8.253 -#ifdef UNSUPPORTED
8.254 - case OP_JLESS:
8.255 - {
8.256 - WriteOp_Jless(jit);
8.257 - break;
8.258 - }
8.259 -#endif
8.260 -#ifdef UNSUPPORTED
8.261 - case OP_JLEQ:
8.262 - {
8.263 - WriteOp_Jeq(jit);
8.264 - break;
8.265 - }
8.266 -#endif
8.267 -#ifdef UNSUPPORTED
8.268 - case OP_JGRTR:
8.269 - {
8.270 - WriteOp_Jgrtr(jit);
8.271 - break;
8.272 - }
8.273 -#endif
8.274 -#ifdef UNSUPPORTED
8.275 - case OP_JGEQ:
8.276 - {
8.277 - WriteOp_Jgeq(jit);
8.278 - break;
8.279 - }
8.280 -#endif
8.281 case OP_JSLESS:
8.282 {
8.283 WriteOp_Jsless(jit);
8.284 @@ -778,6 +618,9 @@
8.285 WriteOp_Jsleq(jit);
8.286 break;
8.287 }
8.288 +#if defined USE_UNGEN_OPCODES
8.289 + #include "ungen_opcode_switch.inc"
8.290 +#endif
8.291 default:
8.292 {
8.293 assert(0);
9.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
9.2 +++ b/sourcepawn/vm/jit/x86/ungen_opcode_switch.inc Sun Sep 24 06:17:10 2006 +0000
9.3 @@ -0,0 +1,100 @@
9.4 + case OP_UMUL:
9.5 + {
9.6 + WriteOp_UMul(jit);
9.7 + break;
9.8 + }
9.9 + case OP_LESS:
9.10 + {
9.11 + WriteOp_Less(jit);
9.12 + break;
9.13 + }
9.14 + case OP_LEQ:
9.15 + {
9.16 + WriteOp_Leq(jit);
9.17 + break;
9.18 + }
9.19 + case OP_GRTR:
9.20 + {
9.21 + WriteOp_Grtr(jit);
9.22 + break;
9.23 + }
9.24 + case OP_GEQ:
9.25 + {
9.26 + WriteOp_Geq(jit);
9.27 + break;
9.28 + }
9.29 + case OP_ALIGN_PRI:
9.30 + {
9.31 + WriteOp_Align_Pri(jit);
9.32 + break;
9.33 + }
9.34 + case OP_ALIGN_ALT:
9.35 + {
9.36 + WriteOp_Align_Alt(jit);
9.37 + break;
9.38 + }
9.39 + case OP_LODB_I:
9.40 + {
9.41 + WriteOp_Lodb_I(jit);
9.42 + break;
9.43 + }
9.44 + case OP_STRB_I:
9.45 + {
9.46 + WriteOp_Strb_I(jit);
9.47 + break;
9.48 + }
9.49 + case OP_LCTRL:
9.50 + {
9.51 + WriteOp_Lctrl(jit);
9.52 + break;
9.53 + }
9.54 + case OP_SCTRL:
9.55 + {
9.56 + WriteOp_Sctrl(jit);
9.57 + break;
9.58 + }
9.59 + case OP_UDIV:
9.60 + {
9.61 + WriteOp_UDiv(jit);
9.62 + break;
9.63 + }
9.64 + case OP_UDIV_ALT:
9.65 + {
9.66 + WriteOp_UDiv_Alt(jit);
9.67 + break;
9.68 + }
9.69 + case OP_RET:
9.70 + {
9.71 + WriteOp_Ret(jit);
9.72 + break;
9.73 + }
9.74 + case OP_CMPS:
9.75 + {
9.76 + WriteOp_Cmps(jit);
9.77 + break;
9.78 + }
9.79 + case OP_JREL:
9.80 + {
9.81 + WriteOp_JRel(jit);
9.82 + break;
9.83 + }
9.84 + case OP_JLESS:
9.85 + {
9.86 + WriteOp_Jless(jit);
9.87 + break;
9.88 + }
9.89 + case OP_JLEQ:
9.90 + {
9.91 + WriteOp_Jeq(jit);
9.92 + break;
9.93 + }
9.94 + case OP_JGRTR:
9.95 + {
9.96 + WriteOp_Jgrtr(jit);
9.97 + break;
9.98 + }
9.99 + case OP_JGEQ:
9.100 + {
9.101 + WriteOp_Jgeq(jit);
9.102 + break;
9.103 + }
9.104 \ No newline at end of file
10.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
10.2 +++ b/sourcepawn/vm/jit/x86/ungen_opcodes.h Sun Sep 24 06:17:10 2006 +0000
10.3 @@ -0,0 +1,336 @@
10.4 +#ifndef _INCLUDE_SOURCEPAWN_JIT_X86_UNGEN_OPCODES_H_
10.5 +#define _INCLUDE_SOURCEPAWN_JIT_X86_UNGEN_OPCODES_H_
10.6 +
10.7 +inline void WriteOp_UMul(JitWriter *jit)
10.8 +{
10.9 + //mov ecx, edx
10.10 + //mul edx
10.11 + //mov edx, ecx
10.12 + IA32_Mov_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
10.13 + IA32_Mul_Rm(jit, AMX_REG_ALT, MOD_REG);
10.14 + IA32_Mov_Rm_Reg(jit, AMX_REG_ALT, AMX_REG_TMP, MOD_REG);
10.15 +}
10.16 +
10.17 +inline void WriteOp_Less(JitWriter *jit)
10.18 +{
10.19 + //cmp eax, edx ; PRI < ALT ? (unsigned)
10.20 + //mov eax, 0
10.21 + //setb al
10.22 + IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.23 + IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
10.24 + IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_B);
10.25 +}
10.26 +
10.27 +inline void WriteOp_Leq(JitWriter *jit)
10.28 +{
10.29 + //cmp eax, edx ; PRI <= ALT ? (unsigned)
10.30 + //mov eax, 0
10.31 + //setbe al
10.32 + IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.33 + IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
10.34 + IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_BE);
10.35 +}
10.36 +
10.37 +inline void WriteOp_Grtr(JitWriter *jit)
10.38 +{
10.39 + //cmp eax, edx ; PRI > ALT ? (unsigned)
10.40 + //mov eax, 0
10.41 + //seta al
10.42 + IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.43 + IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
10.44 + IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_A);
10.45 +}
10.46 +
10.47 +inline void WriteOp_Geq(JitWriter *jit)
10.48 +{
10.49 + //cmp eax, edx ; PRI >= ALT ? (unsigned)
10.50 + //mov eax, 0
10.51 + //setae al
10.52 + IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.53 + IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
10.54 + IA32_SetCC_Rm8(jit, AMX_REG_PRI, CC_AE);
10.55 +}
10.56 +
10.57 +inline void WriteOp_Align_Pri(JitWriter *jit)
10.58 +{
10.59 + //xor eax, <cellsize - val>
10.60 + cell_t val = sizeof(cell_t) - jit->read_cell();
10.61 + if (val < SCHAR_MAX && val > SCHAR_MIN)
10.62 + IA32_Xor_Rm_Imm8(jit, AMX_REG_PRI, MOD_REG, (jit_int8_t)val);
10.63 + else
10.64 + IA32_Xor_Eax_Imm32(jit, val);
10.65 +}
10.66 +
10.67 +inline void WriteOp_Align_Alt(JitWriter *jit)
10.68 +{
10.69 + //xor edx, <cellsize - val>
10.70 + cell_t val = sizeof(cell_t) - jit->read_cell();
10.71 + if (val < SCHAR_MAX && val > SCHAR_MIN)
10.72 + IA32_Xor_Rm_Imm8(jit, AMX_REG_ALT, MOD_REG, (jit_int8_t)val);
10.73 + else
10.74 + IA32_Xor_Rm_Imm32(jit, AMX_REG_ALT, MOD_REG, val);
10.75 +}
10.76 +
10.77 +inline void WriteOp_Cmps(JitWriter *jit)
10.78 +{
10.79 + //push edi
10.80 + //push esi
10.81 + //lea esi, [edi+edx]
10.82 + //lea edi, [edi+eax]
10.83 + IA32_Push_Reg(jit, REG_EDI);
10.84 + IA32_Push_Reg(jit, REG_ESI);
10.85 + IA32_Lea_Reg_DispRegMult(jit, REG_ESI, AMX_REG_DAT, AMX_REG_ALT, NOSCALE);
10.86 + IA32_Lea_Reg_DispRegMult(jit, REG_EDI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
10.87 +
10.88 + //xor eax, eax
10.89 + //repe cmpsb
10.90 + //je :cmps1
10.91 + IA32_Xor_Rm_Reg(jit, REG_EAX, REG_EAX, MOD_REG);
10.92 + IA32_Cmpsb(jit);
10.93 + jitoffs_t jmp = IA32_Jump_Cond_Imm8(jit, CC_E, 0);
10.94 +
10.95 + //sbb eax, eax
10.96 + //sbb eax, -1
10.97 + IA32_Sbb_Rm_Reg(jit, REG_EAX, REG_EAX, MOD_REG);
10.98 + IA32_Sbb_Eax_Imm32(jit, -1);//:TODO: use imm8 here
10.99 +
10.100 + //:cmps1
10.101 + //pop esi
10.102 + //pop edi
10.103 + IA32_Send_Jump8_Here(jit, jmp);
10.104 + IA32_Pop_Reg(jit, REG_ESI);
10.105 + IA32_Pop_Reg(jit, REG_EDI);
10.106 +}
10.107 +
10.108 +inline void WriteOp_Lodb_I(JitWriter *jit)
10.109 +{
10.110 + Write_Check_VerifyAddr(jit, AMX_REG_PRI, false);
10.111 +
10.112 + //mov eax, [edi+eax]
10.113 + IA32_Mov_Reg_Rm_Disp_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
10.114 +
10.115 + //and eax, <bitmask>
10.116 + cell_t val = jit->read_cell();
10.117 + switch(val)
10.118 + {
10.119 + case 1:
10.120 + {
10.121 + IA32_And_Rm_Imm32(jit, AMX_REG_PRI, 0x000000FF);//:TODO: replace with AND EAX, imm32
10.122 + break;
10.123 + }
10.124 + case 2:
10.125 + {
10.126 + IA32_And_Rm_Imm32(jit, AMX_REG_PRI, 0x0000FFFF);//:TODO: replace with AND EAX, imm32
10.127 + break;
10.128 + }
10.129 + }
10.130 +}
10.131 +
10.132 +inline void WriteOp_Strb_I(JitWriter *jit)
10.133 +{
10.134 + Write_Check_VerifyAddr(jit, AMX_REG_ALT, false);
10.135 + //mov [edi+edx], eax
10.136 + cell_t val = jit->read_cell();
10.137 + switch (val)
10.138 + {
10.139 + case 1:
10.140 + {
10.141 + IA32_Mov_Rm8_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
10.142 + break;
10.143 + }
10.144 + case 2:
10.145 + {
10.146 + IA32_Mov_Rm16_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
10.147 + break;
10.148 + }
10.149 + case 4:
10.150 + {
10.151 + IA32_Mov_Rm_Reg_Disp_Reg(jit, AMX_REG_DAT, AMX_REG_ALT, NOSCALE, AMX_REG_PRI);
10.152 + break;
10.153 + }
10.154 + }
10.155 +}
10.156 +
10.157 +inline void WriteOp_Lctrl(JitWriter *jit)
10.158 +{
10.159 + cell_t val = jit->read_cell();
10.160 + switch (val)
10.161 + {
10.162 + case 0:
10.163 + {
10.164 + //mov ecx, [esi+ctx]
10.165 + //mov eax, [ecx+<offs>]
10.166 + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_CONTEXT);
10.167 + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_TMP, offsetof(sp_context_t, base));
10.168 + break;
10.169 + }
10.170 + case 1:
10.171 + {
10.172 + //mov eax, edi
10.173 + IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_DAT, MOD_REG);
10.174 + break;
10.175 + }
10.176 + case 2:
10.177 + {
10.178 + //mov eax, [esi+hea]
10.179 + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_INFO, AMX_INFO_HEAP);
10.180 + break;
10.181 + }
10.182 + case 3:
10.183 + {
10.184 + //mov ecx, [esi+ctx]
10.185 + //mov eax, [ecx+ctx.memory]
10.186 + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_CONTEXT);
10.187 + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_TMP, offsetof(sp_context_t, memory));
10.188 + break;
10.189 + }
10.190 + case 4:
10.191 + {
10.192 + //mov eax, ebp
10.193 + //sub eax, edi - unrelocate
10.194 + IA32_Mov_Reg_Rm(jit, AMX_REG_PRI, AMX_REG_STK, MOD_REG);
10.195 + IA32_Sub_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_DAT, MOD_REG);
10.196 + break;
10.197 + }
10.198 + case 5:
10.199 + {
10.200 + //mov eax, [esi+frm]
10.201 + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_PRI, AMX_REG_INFO, AMX_INFO_FRM);
10.202 + break;
10.203 + }
10.204 + case 6:
10.205 + {
10.206 + //mov eax, [cip]
10.207 + jitoffs_t imm32 = IA32_Mov_Reg_Imm32(jit, AMX_REG_PRI, 0);
10.208 + jitoffs_t save = jit->jit_curpos();
10.209 + jit->setpos(imm32);
10.210 + jit->write_int32((uint32_t)(jit->outbase + save));
10.211 + jit->setpos(save);
10.212 + break;
10.213 + }
10.214 + }
10.215 +}
10.216 +
10.217 +inline void WriteOp_Sctrl(JitWriter *jit)
10.218 +{
10.219 + cell_t val = jit->read_cell();
10.220 + switch (val)
10.221 + {
10.222 + case 2:
10.223 + {
10.224 + //mov [esi+hea], eax
10.225 + IA32_Mov_Rm_Reg_Disp8(jit, AMX_REG_INFO, AMX_INFO_HEAP, AMX_REG_PRI);
10.226 + break;
10.227 + }
10.228 + case 4:
10.229 + {
10.230 + //lea ebp, [edi+eax]
10.231 + IA32_Lea_Reg_DispRegMult(jit, AMX_REG_STK, AMX_REG_DAT, AMX_REG_PRI, NOSCALE);
10.232 + break;
10.233 + }
10.234 + case 5:
10.235 + {
10.236 + //mov ebx, eax - overwrite frm
10.237 + //mov frm, eax - overwrite stacked frame
10.238 + //add ebx, edi - relocate local frm //:TODO: use LEA here!!!
10.239 + IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_PRI, MOD_REG);
10.240 + IA32_Mov_Rm_Reg(jit, AMX_INFO_FRM, AMX_REG_PRI, MOD_MEM_REG);
10.241 + IA32_Add_Rm_Reg(jit, AMX_REG_FRM, AMX_REG_DAT, MOD_REG);
10.242 + break;
10.243 + }
10.244 + case 6:
10.245 + {
10.246 + IA32_Jump_Reg(jit, AMX_REG_PRI);
10.247 + break;
10.248 + }
10.249 + }
10.250 +}
10.251 +
10.252 +inline void WriteOp_UDiv(JitWriter *jit)
10.253 +{
10.254 + //mov ecx, edx
10.255 + //xor edx, edx
10.256 + //div ecx
10.257 + IA32_Mov_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_ALT, MOD_REG);
10.258 + IA32_Xor_Rm_Reg(jit, AMX_REG_ALT, AMX_REG_ALT, MOD_REG);
10.259 + Write_Check_DivZero(jit, AMX_REG_TMP);
10.260 + IA32_Div_Rm(jit, AMX_REG_TMP, MOD_REG);
10.261 +}
10.262 +
10.263 +inline void WriteOp_UDiv_Alt(JitWriter *jit)
10.264 +{
10.265 + //mov ecx, eax
10.266 + //mov eax, edx
10.267 + //xor edx, edx
10.268 + //div ecx
10.269 + IA32_Mov_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_PRI, MOD_REG);
10.270 + IA32_Mov_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.271 + IA32_Xor_Rm_Reg(jit, AMX_REG_ALT, AMX_REG_ALT, MOD_REG);
10.272 + Write_Check_DivZero(jit, AMX_REG_TMP);
10.273 + IA32_Div_Rm(jit, AMX_REG_TMP, MOD_REG);
10.274 +}
10.275 +
10.276 +inline void WriteOp_Ret(JitWriter *jit)
10.277 +{
10.278 + //mov ebx, [ebp] - get old FRM
10.279 + //add ebp, 4 - pop stack
10.280 + //mov [esi+frm], ebx - restore
10.281 + //add ebx, edi - relocate
10.282 + //ret
10.283 + IA32_Mov_Reg_Rm(jit, AMX_REG_FRM, AMX_REG_STK, MOD_MEM_REG);
10.284 + IA32_Add_Rm_Imm8(jit, AMX_REG_STK, 4, MOD_REG);
10.285 + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_INFO, AMX_REG_FRM, AMX_INFO_FRM);//:TODO: this is wrong!
10.286 + IA32_Add_Rm_Reg(jit, AMX_REG_FRM, AMX_REG_DAT, MOD_REG);
10.287 + IA32_Return(jit);
10.288 +}
10.289 +
10.290 +inline void WriteOp_JRel(JitWriter *jit)
10.291 +{
10.292 + //jmp <offs> ;relative jump
10.293 + cell_t cip_offs = jit->read_cell();
10.294 +
10.295 + /* Note that since code size calculation has to be done in the same
10.296 + * phase as building relocation information, we cannot know the jump size
10.297 + * beforehand. Thus, we always write full 32bit jumps for safety.
10.298 + */
10.299 + jitoffs_t jmp = IA32_Jump_Imm32(jit, 0);
10.300 + IA32_Write_Jump32(jit, jmp, RelocLookup(jit, cip_offs));
10.301 +}
10.302 +
10.303 +inline void WriteOp_Jless(JitWriter *jit)
10.304 +{
10.305 + //cmp eax, edx
10.306 + //jb <target>
10.307 + cell_t target = jit->read_cell();
10.308 + IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.309 + IA32_Jump_Cond_Imm32(jit, CC_B, RelocLookup(jit, target, false));
10.310 +}
10.311 +
10.312 +inline void WriteOp_Jleq(JitWriter *jit)
10.313 +{
10.314 + //cmp eax, edx
10.315 + //jbe <target>
10.316 + cell_t target = jit->read_cell();
10.317 + IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.318 + IA32_Jump_Cond_Imm32(jit, CC_BE, RelocLookup(jit, target, false));
10.319 +}
10.320 +
10.321 +inline void WriteOp_Jgrtr(JitWriter *jit)
10.322 +{
10.323 + //cmp eax, edx
10.324 + //ja <target>
10.325 + cell_t target = jit->read_cell();
10.326 + IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.327 + IA32_Jump_Cond_Imm32(jit, CC_A, RelocLookup(jit, target, false));
10.328 +}
10.329 +
10.330 +inline void WriteOp_Jgeq(JitWriter *jit)
10.331 +{
10.332 + //cmp eax, edx
10.333 + //jae <target>
10.334 + cell_t target = jit->read_cell();
10.335 + IA32_Cmp_Rm_Reg(jit, AMX_REG_PRI, AMX_REG_ALT, MOD_REG);
10.336 + IA32_Jump_Cond_Imm32(jit, CC_AE, RelocLookup(jit, target, false));
10.337 +}
10.338 +
10.339 +#endif //_INCLUDE_SOURCEPAWN_JIT_X86_UNGEN_OPCODES_H_
11.1 --- a/sourcepawn/vm/sp_vm_engine.cpp Sat Sep 23 23:37:40 2006 +0000
11.2 +++ b/sourcepawn/vm/sp_vm_engine.cpp Sun Sep 24 06:17:10 2006 +0000
11.3 @@ -6,8 +6,39 @@
11.4 #include "zlib/zlib.h"
11.5 #include "sp_vm_basecontext.h"
11.6
11.7 +#if defined WIN32
11.8 + #define WIN32_LEAN_AND_MEAN
11.9 + #include <windows.h>
11.10 +#else if defined __GNUC__
11.11 + #include <sys/mman.h>
11.12 +#endif
11.13 +
11.14 using namespace SourcePawn;
11.15
11.16 +void *SourcePawnEngine::ExecAlloc(size_t size)
11.17 +{
11.18 +#if defined WIN32
11.19 + return VirtualAlloc(NULL, size, MEM_COMMIT, PAGE_EXECUTE_READWRITE);
11.20 +#else if defined __GNUC__
11.21 + void *base = memalign(sysconf(_SC_PAGESIZE), size);
11.22 + if (mprotect(base, size, PROT_READ|PROT_WRITE|PROT_EXEC) != 0)
11.23 + {
11.24 + free(base);
11.25 + return NULL;
11.26 + }
11.27 + return base;
11.28 +#endif
11.29 +}
11.30 +
11.31 +void SourcePawnEngine::ExecFree(void *address)
11.32 +{
11.33 +#if defined WIN32
11.34 + VirtualFree(address, 0, MEM_RELEASE);
11.35 +#else if defined __GNUC__
11.36 + free(address);
11.37 +#endif
11.38 +}
11.39 +
11.40 void *SourcePawnEngine::BaseAlloc(size_t size)
11.41 {
11.42 return malloc(size);
11.43 @@ -28,7 +59,7 @@
11.44 sp_context_t *_ctx = ctx->GetContext();
11.45 IVirtualMachine *vm = ctx->GetVirtualMachine();
11.46
11.47 - vm->FreeContextVars(_ctx);
11.48 + vm->FreeContext(_ctx);
11.49
11.50 delete ctx;
11.51 }
12.1 --- a/sourcepawn/vm/sp_vm_engine.h Sat Sep 23 23:37:40 2006 +0000
12.2 +++ b/sourcepawn/vm/sp_vm_engine.h Sun Sep 24 06:17:10 2006 +0000
12.3 @@ -67,6 +67,22 @@
12.4 * @param mem Memory address to free.
12.5 */
12.6 void BaseFree(void *memory);
12.7 +
12.8 +
12.9 + /**
12.10 + * Allocates executable memory.
12.11 + *
12.12 + * @param size Size of memory to allocate.
12.13 + * @return Pointer to memory, NULL if allocation failed.
12.14 + */
12.15 + void *ExecAlloc(size_t size);
12.16 +
12.17 + /**
12.18 + * Frees executable memory.
12.19 + *
12.20 + * @param mem Address to free.
12.21 + */
12.22 + void ExecFree(void *address);
12.23 };
12.24 };
12.25
