1.1 --- a/sourcepawn/include/sp_vm_api.h Wed Sep 20 00:41:24 2006 +0000
1.2 +++ b/sourcepawn/include/sp_vm_api.h Wed Sep 20 01:59:56 2006 +0000
1.3 @@ -74,7 +74,11 @@
1.4 virtual void BaseFree(void *memory) =0;
1.5 };
1.6
1.7 - class ICompilation;
1.8 + class ICompilation
1.9 + {
1.10 + public:
1.11 + virtual ~ICompilation() { };
1.12 + };
1.13
1.14 class IVirtualMachine
1.15 {
1.16 @@ -107,9 +111,17 @@
1.17 * Note: This will free the ICompilation pointer.
1.18 *
1.19 * @param co Compilation pointer.
1.20 + * @param err Filled with error code on exit.
1.21 * @return New plugin context.
1.22 */
1.23 - virtual IPluginContext *CompileToContext(ICompilation *co) =0;
1.24 + virtual IPluginContext *CompileToContext(ICompilation *co, int *err) =0;
1.25 +
1.26 + /**
1.27 + * Aborts a compilation and frees the ICompilation pointer.
1.28 + *
1.29 + * @param co Compilation pointer.
1.30 + */
1.31 + virtual void AbortCompilation(ICompilation *co) =0;
1.32
1.33 /**
1.34 * Frees any internal variable usage on a context.
2.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
2.2 +++ b/sourcepawn/include/sp_vm_base.h Wed Sep 20 01:59:56 2006 +0000
2.3 @@ -0,0 +1,14 @@
2.4 +#ifndef _INCLUDE_SOURCEPAWN_VM_BASE_H_
2.5 +#define _INCLUDE_SOURCEPAWN_VM_BASE_H_
2.6 +
2.7 +#include <sp_vm_api.h>
2.8 +
2.9 +#if defined WIN32
2.10 +#define EXPORT_LINK extern "C" __declspec(dllexport)
2.11 +#else if defined __GNUC__
2.12 +#define EXPORT_LINK extern "C" __attribute__((visibility("default")))
2.13 +#endif
2.14 +
2.15 +typedef SourcePawn::IVirtualMachine *(*SP_GETVM_FUNC)(SourcePawn::ISourcePawnEngine *);
2.16 +
2.17 +#endif //_INCLUDE_SOURCEPAWN_VM_BASE_H_
3.1 --- a/sourcepawn/include/sp_vm_types.h Wed Sep 20 00:41:24 2006 +0000
3.2 +++ b/sourcepawn/include/sp_vm_types.h Wed Sep 20 01:59:56 2006 +0000
3.3 @@ -20,6 +20,7 @@
3.4 #define SP_ERR_NATIVE_PENDING 8 /* A script tried to exec an unbound native */
3.5 #define SP_ERR_STACKERR 9 /* Stack/Heap collision */
3.6 #define SP_ERR_NOTDEBUGGING 10 /* Debug mode was not on or debug section not found */
3.7 +#define SP_ERR_INVALID_INSTRUCTION 11 /* Invalid instruction was encountered */
3.8
3.9 /**********************************************
3.10 *** The following structures are reference structures.
4.1 --- a/sourcepawn/vm/jit/jit_helpers.cpp Wed Sep 20 00:41:24 2006 +0000
4.2 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000
4.3 @@ -1,100 +0,0 @@
4.4 -#include <string.h>
4.5 -#include <assert.h>
4.6 -#include "jit_helpers.h"
4.7 -
4.8 -cell_t jit_read_cell(jitinfo_t *jit)
4.9 -{
4.10 - cell_t val = *(jit->inptr);
4.11 - jit->inptr++;
4.12 - return val;
4.13 -}
4.14 -
4.15 -cell_t jit_read_cell_null(jitinfo_t *jit)
4.16 -{
4.17 - return 0;
4.18 -}
4.19 -
4.20 -cell_t *jit_read_cellptr(jitinfo_t *jit)
4.21 -{
4.22 - cell_t *val = *(cell_t **)(jit->inptr);
4.23 - jit->inptr++;
4.24 - return val;
4.25 -}
4.26 -
4.27 -cell_t *jit_read_cellptr_null(jitinfo_t *jit)
4.28 -{
4.29 - return NULL;
4.30 -}
4.31 -
4.32 -void jit_write_ubyte(jitinfo_t *jit, jit_uint8_t c)
4.33 -{
4.34 - *(jit->outptr++) = c;
4.35 -}
4.36 -
4.37 -void jit_write_ubyte_null(jitinfo_t *jit, jit_uint8_t c)
4.38 -{
4.39 - jit->outptr++;
4.40 -}
4.41 -
4.42 -void jit_write_byte(jitinfo_t *jit, jit_int8_t c)
4.43 -{
4.44 - *(jit->outptr++) = c;
4.45 -}
4.46 -
4.47 -void jit_write_byte_null(jitinfo_t *jit, jit_int8_t c)
4.48 -{
4.49 - jit->outptr++;
4.50 -}
4.51 -
4.52 -void jit_write_int32(jitinfo_t *jit, jit_int32_t c)
4.53 -{
4.54 - jit_int32_t *ptr = (jit_int32_t *)jit->outptr;
4.55 - *ptr = c;
4.56 - jit->outptr += sizeof(jit_int32_t);
4.57 -}
4.58 -
4.59 -void jit_write_int32_null(jitinfo_t *jit, jit_int32_t c)
4.60 -{
4.61 - jit->outptr += sizeof(jit_int32_t);
4.62 -}
4.63 -
4.64 -void jit_write_int64(jitinfo_t *jit, jit_int64_t c)
4.65 -{
4.66 - jit_int64_t *ptr = (jit_int64_t *)jit->outptr;
4.67 - *ptr = c;
4.68 - jit->outptr += sizeof(jit_int64_t);
4.69 -}
4.70 -
4.71 -void jit_write_int64_null(jitinfo_t *jit, jit_int64_t c)
4.72 -{
4.73 - jit->outptr += sizeof(jit_int64_t);
4.74 -}
4.75 -
4.76 -jitoffs_t jit_curpos(jitinfo_t *jit)
4.77 -{
4.78 - return (jit->outptr - jit->outbase);
4.79 -}
4.80 -
4.81 -jitwritefuncs_t g_write_funcs =
4.82 -{
4.83 - jit_read_cell,
4.84 - jit_read_cellptr,
4.85 - jit_write_ubyte,
4.86 - jit_write_byte,
4.87 - jit_write_int32,
4.88 - jit_write_int64,
4.89 - jit_curpos
4.90 -};
4.91 -
4.92 -jitwritefuncs_t g_write_null_funcs =
4.93 -{
4.94 - jit_read_cell_null,
4.95 - jit_read_cellptr_null,
4.96 - jit_write_ubyte_null,
4.97 - jit_write_byte_null,
4.98 - jit_write_int32_null,
4.99 - jit_write_int64_null,
4.100 - jit_curpos
4.101 -};
4.102 -
4.103 -
5.1 --- a/sourcepawn/vm/jit/jit_helpers.h Wed Sep 20 00:41:24 2006 +0000
5.2 +++ b/sourcepawn/vm/jit/jit_helpers.h Wed Sep 20 01:59:56 2006 +0000
5.3 @@ -1,5 +1,5 @@
5.4 -#ifndef _INCLUDE_AMX_JIT_H
5.5 -#define _INCLUDE_AMX_JIT_H
5.6 +#ifndef _INCLUDE_SOURCEPAWN_JIT_HELPERS_H_
5.7 +#define _INCLUDE_SOURCEPAWN_JIT_HELPERS_H_
5.8
5.9 #include <sp_vm_types.h>
5.10
5.11 @@ -23,27 +23,53 @@
5.12 typedef char * jitcode_t;
5.13 typedef unsigned int jitoffs_t;
5.14
5.15 -//functions for writing to a JIT
5.16 -typedef struct tagJITWRITEFUNCS
5.17 +class JitWriter
5.18 {
5.19 - //Reading from the input stream
5.20 - cell_t (*read_cell)(struct tagJITINFO *);
5.21 - cell_t *(*read_cellptr)(struct tagJITINFO *);
5.22 - //Writing to the output stream
5.23 - void (*write_ubyte)(struct tagJITINFO *, jit_uint8_t);
5.24 - void (*write_byte)(struct tagJITINFO *, jit_int8_t);
5.25 - void (*write_int32)(struct tagJITINFO *, jit_int32_t);
5.26 - void (*write_int64)(struct tagJITINFO *, jit_int64_t);
5.27 - //helpers
5.28 - jitoffs_t (*jit_curpos)(struct tagJITINFO *);
5.29 -} jitwritefuncs_t;
5.30 -
5.31 -typedef struct tagJITINFO
5.32 -{
5.33 - jitwritefuncs_t wrfuncs;
5.34 +public:
5.35 + inline cell_t read_cell()
5.36 + {
5.37 + cell_t val = *(inptr);
5.38 + inptr++;
5.39 + return val;
5.40 + }
5.41 + inline cell_t read_cellptr()
5.42 + {
5.43 + cell_t *val = *(cell_t **)(inptr);
5.44 + inptr++;
5.45 + return val;
5.46 + }
5.47 + inline void write_ubyte(jit_uint8_t c)
5.48 + {
5.49 + if (outptr)
5.50 + {
5.51 + *outptr = c;
5.52 + }
5.53 + outptr++;
5.54 + }
5.55 + inline void write_byte(jit_int8_t c)
5.56 + {
5.57 + if (outptr)
5.58 + {
5.59 + *outptr = c;
5.60 + }
5.61 + outptr++;
5.62 + }
5.63 + inline void write_int32(jit_int32_t c)
5.64 + {
5.65 + if (outptr)
5.66 + {
5.67 + *(jit_int32_t *)ptr = c;
5.68 + }
5.69 + outptr += sizeof(jit_int32_t);
5.70 + }
5.71 + inline jitoffs_t jit_curpos()
5.72 + {
5.73 + return (outptr - outbase);
5.74 + }
5.75 +public:
5.76 cell_t *inptr; /* input pointer */
5.77 jitcode_t outbase; /* output pointer */
5.78 jitcode_t outptr; /* output base */
5.79 -} jitinfo_t;
5.80 +};
5.81
5.82 -#endif //_INCLUDE_AMX_JIT_H
5.83 +#endif //_INCLUDE_SOURCEPAWN_JIT_HELPERS_H_
6.1 --- a/sourcepawn/vm/jit/x86/jit_x86.cpp Wed Sep 20 00:41:24 2006 +0000
6.2 +++ b/sourcepawn/vm/jit/x86/jit_x86.cpp Wed Sep 20 01:59:56 2006 +0000
6.3 @@ -2,6 +2,255 @@
6.4 #include <stdlib.h>
6.5 #include "jit_x86.h"
6.6
6.7 +int OpAdvTable[OP_NUM_OPCODES];
6.8 +
6.9 +JITX86::JITX86()
6.10 +{
6.11 + memset(OpAdvTable, -1, sizeof(OpAdvTable));
6.12 +
6.13 + /* instructions with 5 parameters */
6.14 + OpAdvTable[OP_PUSH5_C] = sizeof(cell_t)*5;
6.15 + OpAdvTable[OP_PUSH5] = sizeof(cell_t)*5;
6.16 + OpAdvTable[OP_PUSH5_S] = sizeof(cell_t)*5;
6.17 + OpAdvTable[OP_PUSH5_ADR] = sizeof(cell_t)*5;
6.18 +
6.19 + /* instructions with 4 parameters */
6.20 + OpAdvTable[OP_PUSH4_C] = sizeof(cell_t)*4;
6.21 + OpAdvTable[OP_PUSH4] = sizeof(cell_t)*4;
6.22 + OpAdvTable[OP_PUSH4_S] = sizeof(cell_t)*4;
6.23 + OpAdvTable[OP_PUSH4_ADR] = sizeof(cell_t)*4;
6.24 +
6.25 + /* instructions with 3 parameters */
6.26 + OpAdvTable[OP_PUSH3_C] = sizeof(cell_t)*3;
6.27 + OpAdvTable[OP_PUSH3] = sizeof(cell_t)*3;
6.28 + OpAdvTable[OP_PUSH3_S] = sizeof(cell_t)*3;
6.29 + OpAdvTable[OP_PUSH3_ADR] = sizeof(cell_t)*3;
6.30 +
6.31 + /* instructions with 2 parameters */
6.32 + OpAdvTable[OP_PUSH2_C] = sizeof(cell_t)*2;
6.33 + OpAdvTable[OP_PUSH2] = sizeof(cell_t)*2;
6.34 + OpAdvTable[OP_PUSH2_S] = sizeof(cell_t)*2;
6.35 + OpAdvTable[OP_PUSH2_ADR] = sizeof(cell_t)*2;
6.36 + OpAdvTable[OP_LOAD_BOTH] = sizeof(cell_t)*2;
6.37 + OpAdvTable[OP_LOAD_S_BOTH] = sizeof(cell_t)*2;
6.38 + OpAdvTable[OP_CONST] = sizeof(cell_t)*2;
6.39 + OpAdvTable[OP_CONST_S] = sizeof(cell_t)*2;
6.40 +
6.41 + /* instructions with 1 parameter */
6.42 + OpAdvTable[OP_LOAD_PRI] = sizeof(cell_t);
6.43 + OpAdvTable[OP_LOAD_ALT] = sizeof(cell_t);
6.44 + OpAdvTable[OP_LOAD_S_PRI] = sizeof(cell_t);
6.45 + OpAdvTable[OP_LOAD_S_ALT] = sizeof(cell_t);
6.46 + OpAdvTable[OP_LREF_PRI] = sizeof(cell_t);
6.47 + OpAdvTable[OP_LREF_ALT] = sizeof(cell_t);
6.48 + OpAdvTable[OP_LREF_S_PRI] = sizeof(cell_t);
6.49 + OpAdvTable[OP_LREF_S_ALT] = sizeof(cell_t);
6.50 + OpAdvTable[OP_LODB_I] = sizeof(cell_t);
6.51 + OpAdvTable[OP_CONST_PRI] = sizeof(cell_t);
6.52 + OpAdvTable[OP_CONST_ALT] = sizeof(cell_t);
6.53 + OpAdvTable[OP_ADDR_PRI] = sizeof(cell_t);
6.54 + OpAdvTable[OP_ADDR_ALT] = sizeof(cell_t);
6.55 + OpAdvTable[OP_STOR_PRI] = sizeof(cell_t);
6.56 + OpAdvTable[OP_STOR_ALT] = sizeof(cell_t);
6.57 + OpAdvTable[OP_STOR_S_PRI] = sizeof(cell_t);
6.58 + OpAdvTable[OP_STOR_S_ALT] = sizeof(cell_t);
6.59 + OpAdvTable[OP_SREF_PRI] = sizeof(cell_t);
6.60 + OpAdvTable[OP_SREF_ALT] = sizeof(cell_t);
6.61 + OpAdvTable[OP_SREF_S_PRI] = sizeof(cell_t);
6.62 + OpAdvTable[OP_SREF_S_ALT] = sizeof(cell_t);
6.63 + OpAdvTable[OP_STRB_I] = sizeof(cell_t);
6.64 + OpAdvTable[OP_LIDX_B] = sizeof(cell_t);
6.65 + OpAdvTable[OP_IDXADDR_B] = sizeof(cell_t);
6.66 + OpAdvTable[OP_ALIGN_PRI] = sizeof(cell_t);
6.67 + OpAdvTable[OP_ALIGN_ALT] = sizeof(cell_t);
6.68 + OpAdvTable[OP_LCTRL] = sizeof(cell_t);
6.69 + OpAdvTable[OP_SCTRL] = sizeof(cell_t);
6.70 + OpAdvTable[OP_PUSH_R] = sizeof(cell_t);
6.71 + OpAdvTable[OP_PUSH_C] = sizeof(cell_t);
6.72 + OpAdvTable[OP_PUSH] = sizeof(cell_t);
6.73 + OpAdvTable[OP_PUSH_S] = sizeof(cell_t);
6.74 + OpAdvTable[OP_STACK] = sizeof(cell_t);
6.75 + OpAdvTable[OP_HEAP] = sizeof(cell_t);
6.76 + OpAdvTable[OP_JREL] = sizeof(cell_t);
6.77 + OpAdvTable[OP_SHL_C_PRI] = sizeof(cell_t);
6.78 + OpAdvTable[OP_SHL_C_ALT] = sizeof(cell_t);
6.79 + OpAdvTable[OP_SHR_C_PRI] = sizeof(cell_t);
6.80 + OpAdvTable[OP_SHR_C_ALT] = sizeof(cell_t);
6.81 + OpAdvTable[OP_ADD_C] = sizeof(cell_t);
6.82 + OpAdvTable[OP_SMUL_C] = sizeof(cell_t);
6.83 + OpAdvTable[OP_ZERO] = sizeof(cell_t);
6.84 + OpAdvTable[OP_ZERO_S] = sizeof(cell_t);
6.85 + OpAdvTable[OP_EQ_C_PRI] = sizeof(cell_t);
6.86 + OpAdvTable[OP_EQ_C_ALT] = sizeof(cell_t);
6.87 + OpAdvTable[OP_INC] = sizeof(cell_t);
6.88 + OpAdvTable[OP_INC_S] = sizeof(cell_t);
6.89 + OpAdvTable[OP_DEC] = sizeof(cell_t);
6.90 + OpAdvTable[OP_DEC_S] = sizeof(cell_t);
6.91 + OpAdvTable[OP_MOVS] = sizeof(cell_t);
6.92 + OpAdvTable[OP_CMPS] = sizeof(cell_t);
6.93 + OpAdvTable[OP_FILL] = sizeof(cell_t);
6.94 + OpAdvTable[OP_HALT] = sizeof(cell_t);
6.95 + OpAdvTable[OP_BOUNDS] = sizeof(cell_t);
6.96 + OpAdvTable[OP_PUSH_ADR] = sizeof(cell_t);
6.97 +
6.98 + /* instructions with 0 parameters */
6.99 + OpAdvTable[OP_LOAD_I] = 0;
6.100 + OpAdvTable[OP_STOR_I] = 0;
6.101 + OpAdvTable[OP_LIDX] = 0;
6.102 + OpAdvTable[OP_IDXADDR] = 0;
6.103 + OpAdvTable[OP_MOVE_PRI] = 0;
6.104 + OpAdvTable[OP_MOVE_ALT] = 0;
6.105 + OpAdvTable[OP_XCHG] = 0;
6.106 + OpAdvTable[OP_PUSH_PRI] = 0;
6.107 + OpAdvTable[OP_PUSH_ALT] = 0;
6.108 + OpAdvTable[OP_POP_PRI] = 0;
6.109 + OpAdvTable[OP_POP_ALT] = 0;
6.110 + OpAdvTable[OP_PROC] = 0;
6.111 + OpAdvTable[OP_RET] = 0;
6.112 + OpAdvTable[OP_RETN] = 0;
6.113 + OpAdvTable[OP_CALL_PRI] = 0;
6.114 + OpAdvTable[OP_SHL] = 0;
6.115 + OpAdvTable[OP_SHR] = 0;
6.116 + OpAdvTable[OP_SSHR] = 0;
6.117 + OpAdvTable[OP_SMUL] = 0;
6.118 + OpAdvTable[OP_SDIV] = 0;
6.119 + OpAdvTable[OP_SDIV_ALT] = 0;
6.120 + OpAdvTable[OP_UMUL] = 0;
6.121 + OpAdvTable[OP_UDIV] = 0;
6.122 + OpAdvTable[OP_UDIV_ALT] = 0;
6.123 + OpAdvTable[OP_ADD] = 0;
6.124 + OpAdvTable[OP_SUB] = 0;
6.125 + OpAdvTable[OP_SUB_ALT] = 0;
6.126 + OpAdvTable[OP_AND] = 0;
6.127 + OpAdvTable[OP_OR] = 0;
6.128 + OpAdvTable[OP_XOR] = 0;
6.129 + OpAdvTable[OP_NOT] = 0;
6.130 + OpAdvTable[OP_NEG] = 0;
6.131 + OpAdvTable[OP_INVERT] = 0;
6.132 + OpAdvTable[OP_ZERO_PRI] = 0;
6.133 + OpAdvTable[OP_ZERO_ALT] = 0;
6.134 + OpAdvTable[OP_SIGN_PRI] = 0;
6.135 + OpAdvTable[OP_SIGN_ALT] = 0;
6.136 + OpAdvTable[OP_EQ] = 0;
6.137 + OpAdvTable[OP_NEQ] = 0;
6.138 + OpAdvTable[OP_LESS] = 0;
6.139 + OpAdvTable[OP_LEQ] = 0;
6.140 + OpAdvTable[OP_GRTR] = 0;
6.141 + OpAdvTable[OP_GEQ] = 0;
6.142 + OpAdvTable[OP_SLESS] = 0;
6.143 + OpAdvTable[OP_SLEQ] = 0;
6.144 + OpAdvTable[OP_SGRTR] = 0;
6.145 + OpAdvTable[OP_SGEQ] = 0;
6.146 + OpAdvTable[OP_INC_PRI] = 0;
6.147 + OpAdvTable[OP_INC_ALT] = 0;
6.148 + OpAdvTable[OP_INC_I] = 0;
6.149 + OpAdvTable[OP_DEC_PRI] = 0;
6.150 + OpAdvTable[OP_DEC_ALT] = 0;
6.151 + OpAdvTable[OP_DEC_I] = 0;
6.152 + OpAdvTable[OP_JUMP_PRI] = 0;
6.153 + OpAdvTable[OP_SWAP_PRI] = 0;
6.154 + OpAdvTable[OP_SWAP_ALT] = 0;
6.155 + OpAdvTable[OP_NOP] = 0;
6.156 + OpAdvTable[OP_BREAK] = 0;
6.157 +
6.158 + /* opcodes that need relocation */
6.159 + OpAdvTable[OP_CALL] = -2;
6.160 + OpAdvTable[OP_JUMP] = -2;
6.161 + OpAdvTable[OP_JZER] = -2;
6.162 + OpAdvTable[OP_JNZ] = -2;
6.163 + OpAdvTable[OP_JEQ] = -2;
6.164 + OpAdvTable[OP_JNEQ] = -2;
6.165 + OpAdvTable[OP_JLESS] = -2;
6.166 + OpAdvTable[OP_JLEQ] = -2;
6.167 + OpAdvTable[OP_JGRTR] = -2;
6.168 + OpAdvTable[OP_JGEQ] = -2;
6.169 + OpAdvTable[OP_JSLESS] = -2;
6.170 + OpAdvTable[OP_JSLEQ] = -2;
6.171 + OpAdvTable[OP_JSGRTR] = -2;
6.172 + OpAdvTable[OP_JSGEQ] = -2;
6.173 + OpAdvTable[OP_SWITCH] = -2;
6.174 +
6.175 + /* opcodes that are totally invalid */
6.176 + OpAdvTable[OP_FILE] = -3;
6.177 + OpAdvTable[OP_SYMBOL] = -3;
6.178 + OpAdvTable[OP_LINE] = -3;
6.179 + OpAdvTable[OP_SRANGE] = -3;
6.180 + OpAdvTable[OP_SYMTAG] = -3;
6.181 + OpAdvTable[OP_SYSREQ_D] = -3;
6.182 + OpAdvTable[OP_SYSREQ_ND] = -3;
6.183 +}
6.184 +
6.185 +IPluginContext *JITX86::CompileToContext(ICompilation *co, int *err)
6.186 +{
6.187 + CompData *data = (CompData *)co;
6.188 + sp_plugin_t *plugin = data->plugin;
6.189 +
6.190 + /* The first phase is to browse */
6.191 + uint8_t *code = plugin->pcode;
6.192 + uint8_t *cip;
6.193 + uint8_t *end_cip = plugin->pcode + plugin->pcode_size;
6.194 + OPCODE op;
6.195 + int op_c;
6.196 + uint32_t reloc_count = 0;
6.197 +
6.198 + /* FIRST PASS (light load) - Get initial opcode information */
6.199 + for (cip = code; cip < end_cip;)
6.200 + {
6.201 + op = (OPCODE)*(ucell_t *)cip;
6.202 + if ((unsigned)op >= OP_NUM_OPCODES)
6.203 + {
6.204 + AbortCompilation(co);
6.205 + *err = SP_ERR_INVALID_INSTRUCTION;
6.206 + return NULL;
6.207 + }
6.208 + cip += sizeof(cell_t);
6.209 + op_c = OpAdvTable[op];
6.210 + if (op_c >= 0)
6.211 + {
6.212 + cip += op_c;
6.213 + } else if (op_c == -3) {
6.214 + AbortCompilation(co);
6.215 + *err = SP_ERR_INVALID_INSTRUCTION;
6.216 + return NULL;
6.217 + } else if (op_c == -2) {
6.218 + reloc_count++;
6.219 + cip += sizeof(cell_t);
6.220 + } else if (op_c == -1) {
6.221 + switch (op)
6.222 + {
6.223 + case OP_SYSREQ_C:
6.224 + case OP_SYSREQ_PRI:
6.225 + case OP_SYSREQ_N:
6.226 + {
6.227 + if (!data->always_inline)
6.228 + {
6.229 + reloc_count++;
6.230 + }
6.231 + break;
6.232 + }
6.233 + case OP_CASETBL:
6.234 + {
6.235 + ucell_t num = *(ucell_t *)cip;
6.236 + cip += sizeof(cell_t);
6.237 + reloc_count += (num + 1);
6.238 + cip += ((2*num) + 1) * sizeof(cell_t);
6.239 + break;
6.240 + }
6.241 + default:
6.242 + {
6.243 + AbortCompilation(co);
6.244 + *err = SP_ERR_INVALID_INSTRUCTION;
6.245 + return NULL;
6.246 + }
6.247 + }
6.248 + }
6.249 + }
6.250 +
6.251 + *err = SP_ERR_NONE;
6.252 +
6.253 + return NULL;
6.254 +}
6.255 +
6.256 const char *JITX86::GetVMName()
6.257 {
6.258 return "JIT (x86)";
7.1 --- a/sourcepawn/vm/jit/x86/jit_x86.h Wed Sep 20 00:41:24 2006 +0000
7.2 +++ b/sourcepawn/vm/jit/x86/jit_x86.h Wed Sep 20 01:59:56 2006 +0000
7.3 @@ -8,24 +8,198 @@
7.4 class CompData : public ICompilation
7.5 {
7.6 public:
7.7 - CompData() : plugin(NULL), debug(false)
7.8 + CompData() : plugin(NULL), debug(false), always_inline(true)
7.9 {
7.10 };
7.11 public:
7.12 sp_plugin_t *plugin;
7.13 + bool always_inline;
7.14 bool debug;
7.15 };
7.16
7.17 class JITX86 : public IVirtualMachine
7.18 {
7.19 public:
7.20 + JITX86();
7.21 +public:
7.22 const char *GetVMName() =0;
7.23 ICompilation *StartCompilation(sp_plugin_t *plugin);
7.24 bool SetCompilationOption(ICompilation *co, const char *key, const char *val) ;
7.25 - IPluginContext *CompileToContext(ICompilation *co);
7.26 + IPluginContext *CompileToContext(ICompilation *co, int *err);
7.27 void AbortCompilation(ICompilation *co);
7.28 void FreeContextVars(sp_context_t *ctx);
7.29 int ContextExecute(sp_context_t *ctx, uint32_t code_idx, cell_t *result);
7.30 };
7.31
7.32 +typedef enum
7.33 +{
7.34 + OP_NONE, /* invalid opcode */
7.35 + OP_LOAD_PRI, //DONE
7.36 + OP_LOAD_ALT, //DONE
7.37 + OP_LOAD_S_PRI, //DONE
7.38 + OP_LOAD_S_ALT, //DONE
7.39 + OP_LREF_PRI, //DONE
7.40 + OP_LREF_ALT, //DONE
7.41 + OP_LREF_S_PRI, //DONE
7.42 + OP_LREF_S_ALT, //DONE
7.43 + OP_LOAD_I, //DONE
7.44 + OP_LODB_I,
7.45 + OP_CONST_PRI, //DONE
7.46 + OP_CONST_ALT, //DONE
7.47 + OP_ADDR_PRI, //DONE
7.48 + OP_ADDR_ALT, //DONE
7.49 + OP_STOR_PRI, //DONE
7.50 + OP_STOR_ALT, //DONE
7.51 + OP_STOR_S_PRI, //DONE
7.52 + OP_STOR_S_ALT, //DONE
7.53 + OP_SREF_PRI, //DONE
7.54 + OP_SREF_ALT, //DONE
7.55 + OP_SREF_S_PRI, //DONE
7.56 + OP_SREF_S_ALT, //DONE
7.57 + OP_STOR_I, //DONE
7.58 + OP_STRB_I,
7.59 + OP_LIDX, //DONE
7.60 + OP_LIDX_B,
7.61 + OP_IDXADDR, //DONE
7.62 + OP_IDXADDR_B,
7.63 + OP_ALIGN_PRI, //DONE
7.64 + OP_ALIGN_ALT, //DONE
7.65 + OP_LCTRL,
7.66 + OP_SCTRL,
7.67 + OP_MOVE_PRI, //DONE
7.68 + OP_MOVE_ALT, //DONE
7.69 + OP_XCHG, //DONE
7.70 + OP_PUSH_PRI, //DONE
7.71 + OP_PUSH_ALT, //DONE
7.72 + OP_PUSH_R, //DONE
7.73 + OP_PUSH_C, //DONE
7.74 + OP_PUSH, //DONE
7.75 + OP_PUSH_S, //DONE
7.76 + OP_POP_PRI, //DONE
7.77 + OP_POP_ALT, //DONE
7.78 + OP_STACK, //DONE
7.79 + OP_HEAP, //DONE
7.80 + OP_PROC, //DONE
7.81 + OP_RET,
7.82 + OP_RETN, //DONE
7.83 + OP_CALL,
7.84 + OP_CALL_PRI,
7.85 + OP_JUMP, //DONE
7.86 + OP_JREL, //DONE
7.87 + OP_JZER, //DONE
7.88 + OP_JNZ, //DONE
7.89 + OP_JEQ, //DONE
7.90 + OP_JNEQ, //DONE
7.91 + OP_JLESS, //DONE
7.92 + OP_JLEQ, //DONE
7.93 + OP_JGRTR, //DONE
7.94 + OP_JGEQ, //DONE
7.95 + OP_JSLESS, //DONE
7.96 + OP_JSLEQ, //DONE
7.97 + OP_JSGRTR, //DONE
7.98 + OP_JSGEQ, //DONE
7.99 + OP_SHL, //DONE
7.100 + OP_SHR, //DONE
7.101 + OP_SSHR, //DONE
7.102 + OP_SHL_C_PRI, //DONE
7.103 + OP_SHL_C_ALT, //DONE
7.104 + OP_SHR_C_PRI, //DONE
7.105 + OP_SHR_C_ALT, //DONE
7.106 + OP_SMUL, //DONE
7.107 + OP_SDIV, //DONE
7.108 + OP_SDIV_ALT, //DONE
7.109 + OP_UMUL, //DONE
7.110 + OP_UDIV, //DONE
7.111 + OP_UDIV_ALT, //DONE
7.112 + OP_ADD, //DONE
7.113 + OP_SUB, //DONE
7.114 + OP_SUB_ALT, //DONE
7.115 + OP_AND, //DONE
7.116 + OP_OR, //DONE
7.117 + OP_XOR, //DONE
7.118 + OP_NOT, //DONE
7.119 + OP_NEG, //DONE
7.120 + OP_INVERT, //DONE
7.121 + OP_ADD_C, //DONE
7.122 + OP_SMUL_C, //DONE
7.123 + OP_ZERO_PRI, //DONE
7.124 + OP_ZERO_ALT, //DONE
7.125 + OP_ZERO, //DONE
7.126 + OP_ZERO_S, //DONE
7.127 + OP_SIGN_PRI, //DONE
7.128 + OP_SIGN_ALT, //DONE
7.129 + OP_EQ, //DONE
7.130 + OP_NEQ, //DONE
7.131 + OP_LESS, //DONE
7.132 + OP_LEQ, //DONE
7.133 + OP_GRTR, //DONE
7.134 + OP_GEQ, //DONE
7.135 + OP_SLESS, //DONE
7.136 + OP_SLEQ, //DONE
7.137 + OP_SGRTR, //DONE
7.138 + OP_SGEQ, //DONE
7.139 + OP_EQ_C_PRI, //DONE
7.140 + OP_EQ_C_ALT, //DONE
7.141 + OP_INC_PRI, //DONE
7.142 + OP_INC_ALT, //DONE
7.143 + OP_INC, //DONE
7.144 + OP_INC_S, //DONE
7.145 + OP_INC_I, //DONE
7.146 + OP_DEC_PRI, //DONE
7.147 + OP_DEC_ALT, //DONE
7.148 + OP_DEC, //DONE
7.149 + OP_DEC_S, //DONE
7.150 + OP_DEC_I, //DONE
7.151 + OP_MOVS, //DONE
7.152 + OP_CMPS, //DONE
7.153 + OP_FILL, //DONE
7.154 + OP_HALT, //DONE
7.155 + OP_BOUNDS,
7.156 + OP_SYSREQ_PRI,
7.157 + OP_SYSREQ_C,
7.158 + OP_FILE,
7.159 + OP_LINE,
7.160 + OP_SYMBOL,
7.161 + OP_SRANGE,
7.162 + OP_JUMP_PRI,
7.163 + OP_SWITCH,
7.164 + OP_CASETBL, //DONE
7.165 + OP_SWAP_PRI, //DONE
7.166 + OP_SWAP_ALT, //DONE
7.167 + OP_PUSH_ADR, //DONE
7.168 + OP_NOP, //DONE
7.169 + OP_SYSREQ_N,
7.170 + OP_SYMTAG,
7.171 + OP_BREAK,
7.172 + OP_PUSH2_C, //DONE
7.173 + OP_PUSH2, //DONE
7.174 + OP_PUSH2_S, //DONE
7.175 + OP_PUSH2_ADR, //DONE
7.176 + OP_PUSH3_C, //DONE
7.177 + OP_PUSH3, //DONE
7.178 + OP_PUSH3_S, //DONE
7.179 + OP_PUSH3_ADR, //DONE
7.180 + OP_PUSH4_C, //DONE
7.181 + OP_PUSH4, //DONE
7.182 + OP_PUSH4_S, //DONE
7.183 + OP_PUSH4_ADR, //DONE
7.184 + OP_PUSH5_C, //DONE
7.185 + OP_PUSH5, //DONE
7.186 + OP_PUSH5_S, //DONE
7.187 + OP_PUSH5_ADR, //DONE
7.188 + OP_LOAD_BOTH,
7.189 + OP_LOAD_S_BOTH,
7.190 + OP_CONST,
7.191 + OP_CONST_S,
7.192 + /* ----- */
7.193 + OP_SYSREQ_D,
7.194 + OP_SYSREQ_ND,
7.195 + /* ----- */
7.196 + OP_HEAP_PRI,
7.197 + OP_PUSH_HEAP_C,
7.198 + OP_POP_HEAP_PRI,
7.199 + /* ----- */
7.200 + OP_NUM_OPCODES
7.201 +} OPCODE;
7.202 +
7.203 #endif //_INCLUDE_SOURCEPAWN_JIT_X86_H_
8.1 --- a/sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj Wed Sep 20 00:41:24 2006 +0000
8.2 +++ b/sourcepawn/vm/jit/x86/msvc8/jit-x86.vcproj Wed Sep 20 01:59:56 2006 +0000
8.3 @@ -188,10 +188,6 @@
8.4 </FileConfiguration>
8.5 </File>
8.6 <File
8.7 - RelativePath="..\..\jit_helpers.cpp"
8.8 - >
8.9 - </File>
8.10 - <File
8.11 RelativePath="..\jit_x86.cpp"
8.12 >
8.13 </File>
9.1 --- a/sourcepawn/vm/jit/x86/x86_macros.h Wed Sep 20 00:41:24 2006 +0000
9.2 +++ b/sourcepawn/vm/jit/x86/x86_macros.h Wed Sep 20 01:59:56 2006 +0000
9.3 @@ -1,6 +1,8 @@
9.4 #ifndef _INCLUDE_JIT_X86_MACROS_H
9.5 #define _INCLUDE_JIT_X86_MACROS_H
9.6
9.7 +#include "..\jit_helpers.h"
9.8 +
9.9 //MOD R/M
9.10 #define MOD_MEM_REG 0
9.11 #define MOD_DISP8 1
9.12 @@ -134,544 +136,544 @@
9.13 * INCREMENT/DECREMENT *
9.14 ***********************/
9.15
9.16 -inline void IA32_Inc_Rm_Disp32(jitinfo_t *jit, jit_uint8_t reg, jit_int32_t disp)
9.17 +inline void IA32_Inc_Rm_Disp32(JitWriter *jit, jit_uint8_t reg, jit_int32_t disp)
9.18 {
9.19 - jit->wrfuncs.write_ubyte(jit, IA32_INC_RM);
9.20 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, reg));
9.21 - jit->wrfuncs.write_int32(jit, disp);
9.22 + jit->write_ubyte(jit, IA32_INC_RM);
9.23 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, reg));
9.24 + jit->write_int32(jit, disp);
9.25 }
9.26
9.27 -inline void IA32_Inc_Rm_Disp8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t disp)
9.28 +inline void IA32_Inc_Rm_Disp8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp)
9.29 {
9.30 - jit->wrfuncs.write_ubyte(jit, IA32_INC_RM);
9.31 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, reg));
9.32 - jit->wrfuncs.write_byte(jit, disp);
9.33 + jit->write_ubyte(jit, IA32_INC_RM);
9.34 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, reg));
9.35 + jit->write_byte(jit, disp);
9.36 }
9.37
9.38 -inline void IA32_Inc_Rm_Disp_Reg(jitinfo_t *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale)
9.39 +inline void IA32_Inc_Rm_Disp_Reg(JitWriter *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale)
9.40 {
9.41 - jit->wrfuncs.write_ubyte(jit, IA32_INC_RM);
9.42 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
9.43 - jit->wrfuncs.write_ubyte(jit, ia32_sib(scale, reg, base));
9.44 + jit->write_ubyte(jit, IA32_INC_RM);
9.45 + jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
9.46 + jit->write_ubyte(jit, ia32_sib(scale, reg, base));
9.47 }
9.48
9.49 -inline void IA32_Inc_Reg(jitinfo_t *jit, jit_uint8_t reg)
9.50 +inline void IA32_Inc_Reg(JitWriter *jit, jit_uint8_t reg)
9.51 {
9.52 - jit->wrfuncs.write_ubyte(jit, IA32_INC_REG+reg);
9.53 + jit->write_ubyte(jit, IA32_INC_REG+reg);
9.54 }
9.55
9.56 -inline void IA32_Dec_Rm_Disp32(jitinfo_t *jit, jit_uint8_t reg, jit_int32_t disp)
9.57 +inline void IA32_Dec_Rm_Disp32(JitWriter *jit, jit_uint8_t reg, jit_int32_t disp)
9.58 {
9.59 - jit->wrfuncs.write_ubyte(jit, IA32_DEC_RM);
9.60 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 1, reg));
9.61 - jit->wrfuncs.write_int32(jit, disp);
9.62 + jit->write_ubyte(jit, IA32_DEC_RM);
9.63 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 1, reg));
9.64 + jit->write_int32(jit, disp);
9.65 }
9.66
9.67 -inline void IA32_Dec_Rm_Disp8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t disp)
9.68 +inline void IA32_Dec_Rm_Disp8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp)
9.69 {
9.70 - jit->wrfuncs.write_ubyte(jit, IA32_DEC_RM);
9.71 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 1, reg));
9.72 - jit->wrfuncs.write_byte(jit, disp);
9.73 + jit->write_ubyte(jit, IA32_DEC_RM);
9.74 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 1, reg));
9.75 + jit->write_byte(jit, disp);
9.76 }
9.77
9.78 -inline void IA32_Dec_Rm_Disp_Reg(jitinfo_t *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale)
9.79 +inline void IA32_Dec_Rm_Disp_Reg(JitWriter *jit, jit_uint8_t base, jit_uint8_t reg, jit_uint8_t scale)
9.80 {
9.81 - jit->wrfuncs.write_ubyte(jit, IA32_DEC_RM);
9.82 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 1, REG_SIB));
9.83 - jit->wrfuncs.write_ubyte(jit, ia32_sib(scale, reg, base));
9.84 + jit->write_ubyte(jit, IA32_DEC_RM);
9.85 + jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 1, REG_SIB));
9.86 + jit->write_ubyte(jit, ia32_sib(scale, reg, base));
9.87 }
9.88
9.89 -inline void IA32_Dec_Reg(jitinfo_t *jit, jit_uint8_t reg)
9.90 +inline void IA32_Dec_Reg(JitWriter *jit, jit_uint8_t reg)
9.91 {
9.92 - jit->wrfuncs.write_ubyte(jit, IA32_DEC_REG+reg);
9.93 + jit->write_ubyte(jit, IA32_DEC_REG+reg);
9.94 }
9.95
9.96 /****************
9.97 * BINARY LOGIC *
9.98 ****************/
9.99
9.100 -inline void IA32_Xor_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t dest_mode)
9.101 +inline void IA32_Xor_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t dest_mode)
9.102 {
9.103 - jit->wrfuncs.write_ubyte(jit, IA32_XOR_RM_REG);
9.104 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(dest_mode, src, dest));
9.105 + jit->write_ubyte(jit, IA32_XOR_RM_REG);
9.106 + jit->write_ubyte(jit, ia32_modrm(dest_mode, src, dest));
9.107 }
9.108
9.109 -inline void IA32_Xor_Eax_Imm32(jitinfo_t *jit, jit_int32_t value)
9.110 +inline void IA32_Xor_Eax_Imm32(JitWriter *jit, jit_int32_t value)
9.111 {
9.112 - jit->wrfuncs.write_ubyte(jit, IA32_XOR_EAX_IMM32);
9.113 - jit->wrfuncs.write_int32(jit, value);
9.114 + jit->write_ubyte(jit, IA32_XOR_EAX_IMM32);
9.115 + jit->write_int32(jit, value);
9.116 }
9.117
9.118 -inline void IA32_Xor_Rm_Imm32(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value)
9.119 +inline void IA32_Xor_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value)
9.120 {
9.121 - jit->wrfuncs.write_ubyte(jit, IA32_XOR_RM_IMM32);
9.122 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 6, reg));
9.123 - jit->wrfuncs.write_int32(jit, value);
9.124 + jit->write_ubyte(jit, IA32_XOR_RM_IMM32);
9.125 + jit->write_ubyte(jit, ia32_modrm(mode, 6, reg));
9.126 + jit->write_int32(jit, value);
9.127 }
9.128
9.129 -inline void IA32_Xor_Rm_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value)
9.130 +inline void IA32_Xor_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value)
9.131 {
9.132 - jit->wrfuncs.write_ubyte(jit, IA32_XOR_RM_IMM8);
9.133 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 6, reg));
9.134 - jit->wrfuncs.write_byte(jit, value);
9.135 + jit->write_ubyte(jit, IA32_XOR_RM_IMM8);
9.136 + jit->write_ubyte(jit, ia32_modrm(mode, 6, reg));
9.137 + jit->write_byte(jit, value);
9.138 }
9.139
9.140 -inline void IA32_Neg_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.141 +inline void IA32_Neg_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.142 {
9.143 - jit->wrfuncs.write_ubyte(jit, IA32_NEG_RM);
9.144 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 3, reg));
9.145 + jit->write_ubyte(jit, IA32_NEG_RM);
9.146 + jit->write_ubyte(jit, ia32_modrm(mode, 3, reg));
9.147 }
9.148
9.149 -inline void IA32_Or_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.150 +inline void IA32_Or_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.151 {
9.152 - jit->wrfuncs.write_ubyte(jit, IA32_OR_RM_REG);
9.153 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
9.154 + jit->write_ubyte(jit, IA32_OR_RM_REG);
9.155 + jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
9.156 }
9.157
9.158 -inline void IA32_And_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.159 +inline void IA32_And_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.160 {
9.161 - jit->wrfuncs.write_ubyte(jit, IA32_AND_RM_REG);
9.162 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
9.163 + jit->write_ubyte(jit, IA32_AND_RM_REG);
9.164 + jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
9.165 }
9.166
9.167 -inline void IA32_Not_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.168 +inline void IA32_Not_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.169 {
9.170 - jit->wrfuncs.write_ubyte(jit, IA32_NOT_RM);
9.171 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 2, reg));
9.172 + jit->write_ubyte(jit, IA32_NOT_RM);
9.173 + jit->write_ubyte(jit, ia32_modrm(mode, 2, reg));
9.174 }
9.175
9.176 -inline void IA32_Shr_Rm_Imm8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
9.177 +inline void IA32_Shr_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
9.178 {
9.179 - jit->wrfuncs.write_ubyte(jit, IA32_SHR_RM_IMM8);
9.180 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, dest));
9.181 - jit->wrfuncs.write_ubyte(jit, value);
9.182 + jit->write_ubyte(jit, IA32_SHR_RM_IMM8);
9.183 + jit->write_ubyte(jit, ia32_modrm(mode, 5, dest));
9.184 + jit->write_ubyte(jit, value);
9.185 }
9.186
9.187 -inline void IA32_Shl_Rm_Imm8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
9.188 +inline void IA32_Shl_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
9.189 {
9.190 - jit->wrfuncs.write_ubyte(jit, IA32_SHL_RM_IMM8);
9.191 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 4, dest));
9.192 - jit->wrfuncs.write_ubyte(jit, value);
9.193 + jit->write_ubyte(jit, IA32_SHL_RM_IMM8);
9.194 + jit->write_ubyte(jit, ia32_modrm(mode, 4, dest));
9.195 + jit->write_ubyte(jit, value);
9.196 }
9.197
9.198 -inline void IA32_Sar_Rm_Imm8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
9.199 +inline void IA32_Sar_Rm_Imm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t value, jit_uint8_t mode)
9.200 {
9.201 - jit->wrfuncs.write_ubyte(jit, IA32_SAR_RM_IMM8);
9.202 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, dest));
9.203 - jit->wrfuncs.write_ubyte(jit, value);
9.204 + jit->write_ubyte(jit, IA32_SAR_RM_IMM8);
9.205 + jit->write_ubyte(jit, ia32_modrm(mode, 7, dest));
9.206 + jit->write_ubyte(jit, value);
9.207 }
9.208
9.209 -inline void IA32_Sar_Rm_CL(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.210 +inline void IA32_Sar_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.211 {
9.212 - jit->wrfuncs.write_ubyte(jit, IA32_SAR_RM_CL);
9.213 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, reg));
9.214 + jit->write_ubyte(jit, IA32_SAR_RM_CL);
9.215 + jit->write_ubyte(jit, ia32_modrm(mode, 7, reg));
9.216 }
9.217
9.218 -inline void IA32_Shr_Rm_CL(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.219 +inline void IA32_Shr_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.220 {
9.221 - jit->wrfuncs.write_ubyte(jit, IA32_SHR_RM_CL);
9.222 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, reg));
9.223 + jit->write_ubyte(jit, IA32_SHR_RM_CL);
9.224 + jit->write_ubyte(jit, ia32_modrm(mode, 5, reg));
9.225 }
9.226
9.227 -inline void IA32_Shl_Rm_CL(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.228 +inline void IA32_Shl_Rm_CL(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.229 {
9.230 - jit->wrfuncs.write_ubyte(jit, IA32_SHL_RM_CL);
9.231 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 4, reg));
9.232 + jit->write_ubyte(jit, IA32_SHL_RM_CL);
9.233 + jit->write_ubyte(jit, ia32_modrm(mode, 4, reg));
9.234 }
9.235
9.236 -inline void IA32_Xchg_Eax_Reg(jitinfo_t *jit, jit_uint8_t reg)
9.237 +inline void IA32_Xchg_Eax_Reg(JitWriter *jit, jit_uint8_t reg)
9.238 {
9.239 - jit->wrfuncs.write_ubyte(jit, IA32_XCHG_EAX_REG+reg);
9.240 + jit->write_ubyte(jit, IA32_XCHG_EAX_REG+reg);
9.241 }
9.242
9.243 -inline void IA32_Xchg_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.244 +inline void IA32_Xchg_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.245 {
9.246 - jit->wrfuncs.write_ubyte(jit, IA32_XCHG_RM_REG);
9.247 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
9.248 + jit->write_ubyte(jit, IA32_XCHG_RM_REG);
9.249 + jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
9.250 }
9.251
9.252 /**********************
9.253 * ARITHMETIC (BASIC) *
9.254 **********************/
9.255
9.256 -inline void IA32_Add_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.257 +inline void IA32_Add_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.258 {
9.259 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_REG);
9.260 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
9.261 + jit->write_ubyte(jit, IA32_ADD_RM_REG);
9.262 + jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
9.263 }
9.264
9.265 -inline void IA32_Add_Rm_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t value, jit_uint8_t mode)
9.266 +inline void IA32_Add_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t value, jit_uint8_t mode)
9.267 {
9.268 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM8);
9.269 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 0, reg));
9.270 - jit->wrfuncs.write_byte(jit, value);
9.271 + jit->write_ubyte(jit, IA32_ADD_RM_IMM8);
9.272 + jit->write_ubyte(jit, ia32_modrm(mode, 0, reg));
9.273 + jit->write_byte(jit, value);
9.274 }
9.275
9.276 -inline void IA32_Add_Rm_Imm32(jitinfo_t *jit, jit_uint8_t reg, jit_int32_t value, jit_uint8_t mode)
9.277 +inline void IA32_Add_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_int32_t value, jit_uint8_t mode)
9.278 {
9.279 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM32);
9.280 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 0, reg));
9.281 - jit->wrfuncs.write_int32(jit, value);
9.282 + jit->write_ubyte(jit, IA32_ADD_RM_IMM32);
9.283 + jit->write_ubyte(jit, ia32_modrm(mode, 0, reg));
9.284 + jit->write_int32(jit, value);
9.285 }
9.286
9.287 -inline void IA32_Add_Eax_Imm32(jitinfo_t *jit, jit_int32_t value)
9.288 +inline void IA32_Add_Eax_Imm32(JitWriter *jit, jit_int32_t value)
9.289 {
9.290 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_EAX_IMM32);
9.291 - jit->wrfuncs.write_int32(jit, value);
9.292 + jit->write_ubyte(jit, IA32_ADD_EAX_IMM32);
9.293 + jit->write_int32(jit, value);
9.294 }
9.295
9.296 -inline void IA32_Sub_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.297 +inline void IA32_Sub_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.298 {
9.299 - jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_REG);
9.300 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
9.301 + jit->write_ubyte(jit, IA32_SUB_RM_REG);
9.302 + jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
9.303 }
9.304
9.305 -inline void IA32_Sub_Rm_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t val, jit_uint8_t mode)
9.306 +inline void IA32_Sub_Rm_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t val, jit_uint8_t mode)
9.307 {
9.308 - jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM8);
9.309 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, reg));
9.310 - jit->wrfuncs.write_byte(jit, val);
9.311 + jit->write_ubyte(jit, IA32_SUB_RM_IMM8);
9.312 + jit->write_ubyte(jit, ia32_modrm(mode, 5, reg));
9.313 + jit->write_byte(jit, val);
9.314 }
9.315
9.316 -inline void IA32_Sub_Rm_Imm32(jitinfo_t *jit, jit_uint8_t reg, jit_int32_t val, jit_uint8_t mode)
9.317 +inline void IA32_Sub_Rm_Imm32(JitWriter *jit, jit_uint8_t reg, jit_int32_t val, jit_uint8_t mode)
9.318 {
9.319 - jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM32);
9.320 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, reg));
9.321 - jit->wrfuncs.write_int32(jit, val);
9.322 + jit->write_ubyte(jit, IA32_SUB_RM_IMM32);
9.323 + jit->write_ubyte(jit, ia32_modrm(mode, 5, reg));
9.324 + jit->write_int32(jit, val);
9.325 }
9.326
9.327 -inline void IA32_Div_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.328 +inline void IA32_Div_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.329 {
9.330 - jit->wrfuncs.write_ubyte(jit, IA32_DIV_RM);
9.331 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 6, reg));
9.332 + jit->write_ubyte(jit, IA32_DIV_RM);
9.333 + jit->write_ubyte(jit, ia32_modrm(mode, 6, reg));
9.334 }
9.335
9.336 -inline void IA32_IDiv_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.337 +inline void IA32_IDiv_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.338 {
9.339 - jit->wrfuncs.write_ubyte(jit, IA32_IDIV_RM);
9.340 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, reg));
9.341 + jit->write_ubyte(jit, IA32_IDIV_RM);
9.342 + jit->write_ubyte(jit, ia32_modrm(mode, 7, reg));
9.343 }
9.344
9.345 -inline void IA32_Mul_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.346 +inline void IA32_Mul_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.347 {
9.348 - jit->wrfuncs.write_ubyte(jit, IA32_MUL_RM);
9.349 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 4, reg));
9.350 + jit->write_ubyte(jit, IA32_MUL_RM);
9.351 + jit->write_ubyte(jit, ia32_modrm(mode, 4, reg));
9.352 }
9.353
9.354 -inline void IA32_IMul_Rm(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode)
9.355 +inline void IA32_IMul_Rm(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode)
9.356 {
9.357 - jit->wrfuncs.write_ubyte(jit, IA32_IMUL_RM);
9.358 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 5, reg));
9.359 + jit->write_ubyte(jit, IA32_IMUL_RM);
9.360 + jit->write_ubyte(jit, ia32_modrm(mode, 5, reg));
9.361 }
9.362
9.363 -inline void IA32_IMul_Reg_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value)
9.364 +inline void IA32_IMul_Reg_Imm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int8_t value)
9.365 {
9.366 - jit->wrfuncs.write_ubyte(jit, IA32_IMUL_REG_IMM8);
9.367 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 0, reg));
9.368 - jit->wrfuncs.write_byte(jit, value);
9.369 + jit->write_ubyte(jit, IA32_IMUL_REG_IMM8);
9.370 + jit->write_ubyte(jit, ia32_modrm(mode, 0, reg));
9.371 + jit->write_byte(jit, value);
9.372 }
9.373
9.374 -inline void IA32_IMul_Reg_Imm32(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value)
9.375 +inline void IA32_IMul_Reg_Imm32(JitWriter *jit, jit_uint8_t reg, jit_uint8_t mode, jit_int32_t value)
9.376 {
9.377 - jit->wrfuncs.write_ubyte(jit, IA32_IMUL_REG_IMM32);
9.378 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 0, reg));
9.379 - jit->wrfuncs.write_int32(jit, value);
9.380 + jit->write_ubyte(jit, IA32_IMUL_REG_IMM32);
9.381 + jit->write_ubyte(jit, ia32_modrm(mode, 0, reg));
9.382 + jit->write_int32(jit, value);
9.383 }
9.384
9.385 -inline void IA32_Add_Rm_Reg_Disp8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
9.386 +inline void IA32_Add_Rm_Reg_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
9.387 {
9.388 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_REG);
9.389 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest));
9.390 - jit->wrfuncs.write_byte(jit, disp);
9.391 + jit->write_ubyte(jit, IA32_ADD_RM_REG);
9.392 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest));
9.393 + jit->write_byte(jit, disp);
9.394 }
9.395
9.396 -inline void IA32_Add_Rm_Imm8_Disp8(jitinfo_t *jit,
9.397 +inline void IA32_Add_Rm_Imm8_Disp8(JitWriter *jit,
9.398 jit_uint8_t dest,
9.399 jit_int8_t val,
9.400 jit_int8_t disp8)
9.401 {
9.402 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM8);
9.403 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
9.404 - jit->wrfuncs.write_byte(jit, disp8);
9.405 - jit->wrfuncs.write_byte(jit, val);
9.406 + jit->write_ubyte(jit, IA32_ADD_RM_IMM8);
9.407 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
9.408 + jit->write_byte(jit, disp8);
9.409 + jit->write_byte(jit, val);
9.410 }
9.411
9.412 -inline void IA32_Add_Rm_Imm32_Disp8(jitinfo_t *jit,
9.413 +inline void IA32_Add_Rm_Imm32_Disp8(JitWriter *jit,
9.414 jit_uint8_t dest,
9.415 jit_int32_t val,
9.416 jit_int8_t disp8)
9.417 {
9.418 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM32);
9.419 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
9.420 - jit->wrfuncs.write_byte(jit, disp8);
9.421 - jit->wrfuncs.write_int32(jit, val);
9.422 + jit->write_ubyte(jit, IA32_ADD_RM_IMM32);
9.423 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
9.424 + jit->write_byte(jit, disp8);
9.425 + jit->write_int32(jit, val);
9.426 }
9.427
9.428 -inline void IA32_Add_Rm_Imm8_Disp32(jitinfo_t *jit,
9.429 +inline void IA32_Add_Rm_Imm8_Disp32(JitWriter *jit,
9.430 jit_uint8_t dest,
9.431 jit_int8_t val,
9.432 jit_int32_t disp32)
9.433 {
9.434 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM8);
9.435 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest));
9.436 - jit->wrfuncs.write_int32(jit, disp32);
9.437 - jit->wrfuncs.write_byte(jit, val);
9.438 + jit->write_ubyte(jit, IA32_ADD_RM_IMM8);
9.439 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest));
9.440 + jit->write_int32(jit, disp32);
9.441 + jit->write_byte(jit, val);
9.442 }
9.443
9.444 -inline void IA32_Add_Rm_Imm8_Disp_Reg(jitinfo_t *jit,
9.445 +inline void IA32_Add_Rm_Imm8_Disp_Reg(JitWriter *jit,
9.446 jit_uint8_t dest_base,
9.447 jit_uint8_t dest_index,
9.448 jit_uint8_t dest_scale,
9.449 jit_int8_t val)
9.450 {
9.451 - jit->wrfuncs.write_ubyte(jit, IA32_ADD_RM_IMM8);
9.452 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
9.453 - jit->wrfuncs.write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
9.454 - jit->wrfuncs.write_byte(jit, val);
9.455 + jit->write_ubyte(jit, IA32_ADD_RM_IMM8);
9.456 + jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
9.457 + jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
9.458 + jit->write_byte(jit, val);
9.459 }
9.460
9.461 -inline void IA32_Sub_Rm_Imm8_Disp8(jitinfo_t *jit,
9.462 +inline void IA32_Sub_Rm_Imm8_Disp8(JitWriter *jit,
9.463 jit_uint8_t dest,
9.464 jit_int8_t val,
9.465 jit_int8_t disp8)
9.466 {
9.467 - jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM8);
9.468 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 5, dest));
9.469 - jit->wrfuncs.write_byte(jit, disp8);
9.470 - jit->wrfuncs.write_byte(jit, val);
9.471 + jit->write_ubyte(jit, IA32_SUB_RM_IMM8);
9.472 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 5, dest));
9.473 + jit->write_byte(jit, disp8);
9.474 + jit->write_byte(jit, val);
9.475 }
9.476
9.477 -inline void IA32_Sub_Rm_Imm8_Disp32(jitinfo_t *jit,
9.478 +inline void IA32_Sub_Rm_Imm8_Disp32(JitWriter *jit,
9.479 jit_uint8_t dest,
9.480 jit_int8_t val,
9.481 jit_int32_t disp32)
9.482 {
9.483 - jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM8);
9.484 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 5, dest));
9.485 - jit->wrfuncs.write_int32(jit, disp32);
9.486 - jit->wrfuncs.write_byte(jit, val);
9.487 + jit->write_ubyte(jit, IA32_SUB_RM_IMM8);
9.488 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 5, dest));
9.489 + jit->write_int32(jit, disp32);
9.490 + jit->write_byte(jit, val);
9.491 }
9.492
9.493 -inline void IA32_Sub_Rm_Imm8_Disp_Reg(jitinfo_t *jit,
9.494 +inline void IA32_Sub_Rm_Imm8_Disp_Reg(JitWriter *jit,
9.495 jit_uint8_t dest_base,
9.496 jit_uint8_t dest_index,
9.497 jit_uint8_t dest_scale,
9.498 jit_int8_t val)
9.499 {
9.500 - jit->wrfuncs.write_ubyte(jit, IA32_SUB_RM_IMM8);
9.501 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 5, REG_SIB));
9.502 - jit->wrfuncs.write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
9.503 - jit->wrfuncs.write_byte(jit, val);
9.504 + jit->write_ubyte(jit, IA32_SUB_RM_IMM8);
9.505 + jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 5, REG_SIB));
9.506 + jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
9.507 + jit->write_byte(jit, val);
9.508 }
9.509
9.510 /**
9.511 * Memory Instructions
9.512 */
9.513
9.514 -inline void IA32_Lea_Reg_DispRegMult(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_uint8_t src_index, jit_uint8_t scale)
9.515 +inline void IA32_Lea_Reg_DispRegMult(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_uint8_t src_index, jit_uint8_t scale)
9.516 {
9.517 - jit->wrfuncs.write_ubyte(jit, IA32_LEA_REG_MEM);
9.518 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
9.519 - jit->wrfuncs.write_ubyte(jit, ia32_sib(scale, src_index, src_base));
9.520 + jit->write_ubyte(jit, IA32_LEA_REG_MEM);
9.521 + jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
9.522 + jit->write_ubyte(jit, ia32_sib(scale, src_index, src_base));
9.523 }
9.524
9.525 -inline void IA32_Lea_Reg_DispRegMultImm8(jitinfo_t *jit,
9.526 +inline void IA32_Lea_Reg_DispRegMultImm8(JitWriter *jit,
9.527 jit_uint8_t dest,
9.528 jit_uint8_t src_base,
9.529 jit_uint8_t src_index,
9.530 jit_uint8_t scale,
9.531 jit_int8_t val)
9.532 {
9.533 - jit->wrfuncs.write_ubyte(jit, IA32_LEA_REG_MEM);
9.534 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, REG_SIB));
9.535 - jit->wrfuncs.write_ubyte(jit, ia32_sib(scale, src_index, src_base));
9.536 - jit->wrfuncs.write_byte(jit, val);
9.537 + jit->write_ubyte(jit, IA32_LEA_REG_MEM);
9.538 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, REG_SIB));
9.539 + jit->write_ubyte(jit, ia32_sib(scale, src_index, src_base));
9.540 + jit->write_byte(jit, val);
9.541 }
9.542
9.543 -inline void IA32_Lea_DispRegImm8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int8_t val)
9.544 +inline void IA32_Lea_DispRegImm8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int8_t val)
9.545 {
9.546 - jit->wrfuncs.write_ubyte(jit, IA32_LEA_REG_MEM);
9.547 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, MOD_MEM_REG));
9.548 - jit->wrfuncs.write_byte(jit, val);
9.549 + jit->write_ubyte(jit, IA32_LEA_REG_MEM);
9.550 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, MOD_MEM_REG));
9.551 + jit->write_byte(jit, val);
9.552 }
9.553
9.554 -inline void IA32_Lea_DispRegImm32(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int32_t val)
9.555 +inline void IA32_Lea_DispRegImm32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src_base, jit_int32_t val)
9.556 {
9.557 - jit->wrfuncs.write_ubyte(jit, IA32_LEA_REG_MEM);
9.558 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, MOD_MEM_REG));
9.559 - jit->wrfuncs.write_int32(jit, val);
9.560 + jit->write_ubyte(jit, IA32_LEA_REG_MEM);
9.561 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, MOD_MEM_REG));
9.562 + jit->write_int32(jit, val);
9.563 }
9.564
9.565 /**
9.566 * Stack Instructions
9.567 */
9.568
9.569 -inline void IA32_Pop_Reg(jitinfo_t *jit, jit_uint8_t reg)
9.570 +inline void IA32_Pop_Reg(JitWriter *jit, jit_uint8_t reg)
9.571 {
9.572 - jit->wrfuncs.write_ubyte(jit, IA32_POP_REG+reg);
9.573 + jit->write_ubyte(jit, IA32_POP_REG+reg);
9.574 }
9.575
9.576 -inline void IA32_Push_Reg(jitinfo_t *jit, jit_uint8_t reg)
9.577 +inline void IA32_Push_Reg(JitWriter *jit, jit_uint8_t reg)
9.578 {
9.579 - jit->wrfuncs.write_ubyte(jit, IA32_PUSH_REG+reg);
9.580 + jit->write_ubyte(jit, IA32_PUSH_REG+reg);
9.581 }
9.582
9.583 /**
9.584 * Moving from REGISTER/MEMORY to REGISTER
9.585 */
9.586
9.587 -inline void IA32_Mov_Reg_Rm(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.588 +inline void IA32_Mov_Reg_Rm(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.589 {
9.590 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_MEM);
9.591 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, dest, src));
9.592 + jit->write_ubyte(jit, IA32_MOV_REG_MEM);
9.593 + jit->write_ubyte(jit, ia32_modrm(mode, dest, src));
9.594 }
9.595
9.596 -inline void IA32_Mov_Reg_Rm_Disp8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
9.597 +inline void IA32_Mov_Reg_Rm_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
9.598 {
9.599 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_MEM);
9.600 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, src));
9.601 - jit->wrfuncs.write_byte(jit, disp);
9.602 + jit->write_ubyte(jit, IA32_MOV_REG_MEM);
9.603 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, dest, src));
9.604 + jit->write_byte(jit, disp);
9.605 }
9.606
9.607 -inline void IA32_Mov_Reg_Rm_Disp32(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp)
9.608 +inline void IA32_Mov_Reg_Rm_Disp32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp)
9.609 {
9.610 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_MEM);
9.611 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, src));
9.612 - jit->wrfuncs.write_int32(jit, disp);
9.613 + jit->write_ubyte(jit, IA32_MOV_REG_MEM);
9.614 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, dest, src));
9.615 + jit->write_int32(jit, disp);
9.616 }
9.617
9.618 -inline void IA32_Mov_Reg_Rm_Disp_Reg(jitinfo_t *jit,
9.619 +inline void IA32_Mov_Reg_Rm_Disp_Reg(JitWriter *jit,
9.620 jit_uint8_t dest,
9.621 jit_uint8_t src_base,
9.622 jit_uint8_t src_index,
9.623 jit_uint8_t src_scale)
9.624 {
9.625 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_MEM);
9.626 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
9.627 - jit->wrfuncs.write_ubyte(jit, ia32_sib(src_scale, src_index, src_base));
9.628 + jit->write_ubyte(jit, IA32_MOV_REG_MEM);
9.629 + jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, dest, REG_SIB));
9.630 + jit->write_ubyte(jit, ia32_sib(src_scale, src_index, src_base));
9.631 }
9.632
9.633 /**
9.634 * Moving from REGISTER to REGISTER/MEMORY
9.635 */
9.636
9.637 -inline void IA32_Mov_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.638 +inline void IA32_Mov_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.639 {
9.640 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_REG);
9.641 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
9.642 + jit->write_ubyte(jit, IA32_MOV_RM_REG);
9.643 + jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
9.644 }
9.645
9.646 -inline void IA32_Mov_Rm_Reg_Disp8(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
9.647 +inline void IA32_Mov_Rm_Reg_Disp8(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int8_t disp)
9.648 {
9.649 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_REG);
9.650 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest));
9.651 - jit->wrfuncs.write_byte(jit, disp);
9.652 + jit->write_ubyte(jit, IA32_MOV_RM_REG);
9.653 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, src, dest));
9.654 + jit->write_byte(jit, disp);
9.655 }
9.656
9.657 -inline void IA32_Mov_Rm_Reg_Disp32(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp)
9.658 +inline void IA32_Mov_Rm_Reg_Disp32(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_int32_t disp)
9.659 {
9.660 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_REG);
9.661 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, src, dest));
9.662 - jit->wrfuncs.write_int32(jit, disp);
9.663 + jit->write_ubyte(jit, IA32_MOV_RM_REG);
9.664 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, src, dest));
9.665 + jit->write_int32(jit, disp);
9.666 }
9.667
9.668 -inline void IA32_Mov_Rm_Reg_Disp_Reg(jitinfo_t *jit,
9.669 +inline void IA32_Mov_Rm_Reg_Disp_Reg(JitWriter *jit,
9.670 jit_uint8_t dest_base,
9.671 jit_uint8_t dest_index,
9.672 jit_uint8_t dest_scale,
9.673 jit_uint8_t src)
9.674 {
9.675 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_REG);
9.676 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, src, REG_SIB));
9.677 - jit->wrfuncs.write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
9.678 + jit->write_ubyte(jit, IA32_MOV_RM_REG);
9.679 + jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, src, REG_SIB));
9.680 + jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
9.681 }
9.682
9.683 /**
9.684 * Moving from IMMEDIATE to REGISTER
9.685 */
9.686
9.687 -inline void IA32_Mov_Reg_Imm32(jitinfo_t *jit, jit_uint8_t dest, jit_int32_t num)
9.688 +inline void IA32_Mov_Reg_Imm32(JitWriter *jit, jit_uint8_t dest, jit_int32_t num)
9.689 {
9.690 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_REG_IMM+dest);
9.691 - jit->wrfuncs.write_int32(jit, num);
9.692 + jit->write_ubyte(jit, IA32_MOV_REG_IMM+dest);
9.693 + jit->write_int32(jit, num);
9.694 }
9.695
9.696 -inline void IA32_Mov_Rm_Imm32_Disp8(jitinfo_t *jit,
9.697 +inline void IA32_Mov_Rm_Imm32_Disp8(JitWriter *jit,
9.698 jit_uint8_t dest,
9.699 jit_int32_t val,
9.700 jit_int8_t disp8)
9.701 {
9.702 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_IMM32);
9.703 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
9.704 - jit->wrfuncs.write_byte(jit, disp8);
9.705 - jit->wrfuncs.write_int32(jit, val);
9.706 + jit->write_ubyte(jit, IA32_MOV_RM_IMM32);
9.707 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 0, dest));
9.708 + jit->write_byte(jit, disp8);
9.709 + jit->write_int32(jit, val);
9.710 }
9.711
9.712 -inline void IA32_Mov_Rm_Imm32_Disp32(jitinfo_t *jit,
9.713 +inline void IA32_Mov_Rm_Imm32_Disp32(JitWriter *jit,
9.714 jit_uint8_t dest,
9.715 jit_int32_t val,
9.716 jit_int32_t disp32)
9.717 {
9.718 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_IMM32);
9.719 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest));
9.720 - jit->wrfuncs.write_int32(jit, disp32);
9.721 - jit->wrfuncs.write_int32(jit, val);
9.722 + jit->write_ubyte(jit, IA32_MOV_RM_IMM32);
9.723 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP32, 0, dest));
9.724 + jit->write_int32(jit, disp32);
9.725 + jit->write_int32(jit, val);
9.726 }
9.727
9.728 -inline void IA32_Mov_Rm_Imm32_Disp_Reg(jitinfo_t *jit,
9.729 +inline void IA32_Mov_Rm_Imm32_Disp_Reg(JitWriter *jit,
9.730 jit_uint8_t dest_base,
9.731 jit_uint8_t dest_index,
9.732 jit_uint8_t dest_scale,
9.733 jit_int32_t val)
9.734 {
9.735 - jit->wrfuncs.write_ubyte(jit, IA32_MOV_RM_IMM32);
9.736 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
9.737 - jit->wrfuncs.write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
9.738 - jit->wrfuncs.write_int32(jit, val);
9.739 + jit->write_ubyte(jit, IA32_MOV_RM_IMM32);
9.740 + jit->write_ubyte(jit, ia32_modrm(MOD_MEM_REG, 0, REG_SIB));
9.741 + jit->write_ubyte(jit, ia32_sib(dest_scale, dest_index, dest_base));
9.742 + jit->write_int32(jit, val);
9.743 }
9.744
9.745 /**
9.746 * Branching/Jumping
9.747 */
9.748
9.749 -inline jitoffs_t IA32_Jump_Cond_Imm8(jitinfo_t *jit, jit_uint8_t cond, jit_int8_t disp)
9.750 +inline jitoffs_t IA32_Jump_Cond_Imm8(JitWriter *jit, jit_uint8_t cond, jit_int8_t disp)
9.751 {
9.752 jitoffs_t ptr;
9.753 - jit->wrfuncs.write_ubyte(jit, IA32_JCC_IMM+cond);
9.754 - ptr = (jit->outptr-jit->outbase);
9.755 - jit->wrfuncs.write_byte(jit, disp);
9.756 + jit->write_ubyte(jit, IA32_JCC_IMM+cond);
9.757 + ptr = jit->jit_curpos();
9.758 + jit->write_byte(jit, disp);
9.759 return ptr;
9.760 }
9.761
9.762 -inline jitoffs_t IA32_Jump_Imm32(jitinfo_t *jit, jit_int32_t disp)
9.763 +inline jitoffs_t IA32_Jump_Imm32(JitWriter *jit, jit_int32_t disp)
9.764 {
9.765 jitoffs_t ptr;
9.766 - jit->wrfuncs.write_ubyte(jit, IA32_JMP_IMM32);
9.767 - ptr = (jit->outptr-jit->outbase);
9.768 - jit->wrfuncs.write_int32(jit, disp);
9.769 + jit->write_ubyte(jit, IA32_JMP_IMM32);
9.770 + ptr = jit->jit_curpos();
9.771 + jit->write_int32(jit, disp);
9.772 return ptr;
9.773 }
9.774
9.775 -inline jitoffs_t IA32_Jump_Cond_Imm32(jitinfo_t *jit, jit_uint8_t cond, jit_int32_t disp)
9.776 +inline jitoffs_t IA32_Jump_Cond_Imm32(JitWriter *jit, jit_uint8_t cond, jit_int32_t disp)
9.777 {
9.778 jitoffs_t ptr;
9.779 - jit->wrfuncs.write_ubyte(jit, IA32_JCC_IMM32_1);
9.780 - jit->wrfuncs.write_ubyte(jit, IA32_JCC_IMM32_2+cond);
9.781 - ptr = (jit->outptr-jit->outbase);
9.782 - jit->wrfuncs.write_int32(jit, disp);
9.783 + jit->write_ubyte(jit, IA32_JCC_IMM32_1);
9.784 + jit->write_ubyte(jit, IA32_JCC_IMM32_2+cond);
9.785 + ptr = jit->jit_curpos();
9.786 + jit->write_int32(jit, disp);
9.787 return ptr;
9.788 }
9.789
9.790 -inline jitoffs_t IA32_Call_Imm32(jitinfo_t *jit, jit_int32_t disp)
9.791 +inline jitoffs_t IA32_Call_Imm32(JitWriter *jit, jit_int32_t disp)
9.792 {
9.793 jitoffs_t ptr;
9.794 - jit->wrfuncs.write_ubyte(jit, IA32_CALL_IMM32);
9.795 - ptr = (jit->outptr-jit->outbase);
9.796 - jit->wrfuncs.write_int32(jit, disp);
9.797 + jit->write_ubyte(jit, IA32_CALL_IMM32);
9.798 + ptr = jit->jit_curpos();
9.799 + jit->write_int32(jit, disp);
9.800 return ptr;
9.801 }
9.802
9.803 -inline void IA32_Write_Jump8(jitinfo_t *jit, jitoffs_t jmp, jitoffs_t target)
9.804 +inline void IA32_Write_Jump8(JitWriter *jit, jitoffs_t jmp, jitoffs_t target)
9.805 {
9.806 //save old ptr
9.807 jitcode_t oldptr = jit->outptr;
9.808 @@ -679,92 +681,92 @@
9.809 jit_int8_t diff = (target - (jmp + 1));
9.810 //overwrite old value
9.811 jit->outptr = jit->outbase + jmp;
9.812 - jit->wrfuncs.write_byte(jit, diff);
9.813 + jit->write_byte(jit, diff);
9.814 //restore old ptr
9.815 jit->outptr = oldptr;
9.816 }
9.817
9.818 -inline void IA32_Send_Jump8_Here(jitinfo_t *jit, jitoffs_t jmp)
9.819 +inline void IA32_Send_Jump8_Here(JitWriter *jit, jitoffs_t jmp)
9.820 {
9.821 - jitoffs_t curptr = jit->wrfuncs.jit_curpos(jit);
9.822 + jitoffs_t curptr = jit->jit_curpos(jit);
9.823 IA32_Write_Jump8(jit, jmp, curptr);
9.824 }
9.825
9.826 -inline void IA32_Return(jitinfo_t *jit)
9.827 +inline void IA32_Return(JitWriter *jit)
9.828 {
9.829 - jit->wrfuncs.write_ubyte(jit, IA32_RET);
9.830 + jit->write_ubyte(jit, IA32_RET);
9.831 }
9.832
9.833 -inline void IA32_Test_Rm_Reg(jitinfo_t *jit, jit_uint8_t reg1, jit_uint8_t reg2, jit_uint8_t mode)
9.834 +inline void IA32_Test_Rm_Reg(JitWriter *jit, jit_uint8_t reg1, jit_uint8_t reg2, jit_uint8_t mode)
9.835 {
9.836 - jit->wrfuncs.write_ubyte(jit, IA32_TEST_RM_REG);
9.837 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, reg2, reg1));
9.838 + jit->write_ubyte(jit, IA32_TEST_RM_REG);
9.839 + jit->write_ubyte(jit, ia32_modrm(mode, reg2, reg1));
9.840 }
9.841
9.842 -inline void IA32_Cmp_Rm_Reg(jitinfo_t *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.843 +inline void IA32_Cmp_Rm_Reg(JitWriter *jit, jit_uint8_t dest, jit_uint8_t src, jit_uint8_t mode)
9.844 {
9.845 - jit->wrfuncs.write_ubyte(jit, IA32_CMP_RM_REG);
9.846 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, src, dest));
9.847 + jit->write_ubyte(jit, IA32_CMP_RM_REG);
9.848 + jit->write_ubyte(jit, ia32_modrm(mode, src, dest));
9.849 }
9.850
9.851 -inline void IA32_Cmp_Rm_Imm8(jitinfo_t *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int8_t imm8)
9.852 +inline void IA32_Cmp_Rm_Imm8(JitWriter *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int8_t imm8)
9.853 {
9.854 - jit->wrfuncs.write_ubyte(jit, IA32_CMP_RM_IMM8);
9.855 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, rm));
9.856 - jit->wrfuncs.write_byte(jit, imm8);
9.857 + jit->write_ubyte(jit, IA32_CMP_RM_IMM8);
9.858 + jit->write_ubyte(jit, ia32_modrm(mode, 7, rm));
9.859 + jit->write_byte(jit, imm8);
9.860 }
9.861
9.862 -inline void IA32_Cmp_Rm_Imm32(jitinfo_t *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int32_t imm32)
9.863 +inline void IA32_Cmp_Rm_Imm32(JitWriter *jit, jit_uint8_t mode, jit_uint8_t rm, jit_int32_t imm32)
9.864 {
9.865 - jit->wrfuncs.write_ubyte(jit, IA32_CMP_RM_IMM32);
9.866 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(mode, 7, rm));
9.867 - jit->wrfuncs.write_int32(jit, imm32);
9.868 + jit->write_ubyte(jit, IA32_CMP_RM_IMM32);
9.869 + jit->write_ubyte(jit, ia32_modrm(mode, 7, rm));
9.870 + jit->write_int32(jit, imm32);
9.871 }
9.872
9.873 -inline void IA32_Cmp_Rm_Disp8_Imm8(jitinfo_t *jit, jit_uint8_t reg, jit_int8_t disp, jit_int8_t imm8)
9.874 +inline void IA32_Cmp_Rm_Disp8_Imm8(JitWriter *jit, jit_uint8_t reg, jit_int8_t disp, jit_int8_t imm8)
9.875 {
9.876 - jit->wrfuncs.write_ubyte(jit, IA32_CMP_RM_IMM8);
9.877 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_DISP8, 7, reg));
9.878 - jit->wrfuncs.write_byte(jit, disp);
9.879 - jit->wrfuncs.write_byte(jit, imm8);
9.880 + jit->write_ubyte(jit, IA32_CMP_RM_IMM8);
9.881 + jit->write_ubyte(jit, ia32_modrm(MOD_DISP8, 7, reg));
9.882 + jit->write_byte(jit, disp);
9.883 + jit->write_byte(jit, imm8);
9.884 }
9.885
9.886 -inline void IA32_Cmp_Eax_Imm32(jitinfo_t *jit, jit_int32_t value)
9.887 +inline void IA32_Cmp_Eax_Imm32(JitWriter *jit, jit_int32_t value)
9.888 {
9.889 - jit->wrfuncs.write_ubyte(jit, IA32_CMP_EAX_IMM32);
9.890 - jit->wrfuncs.write_int32(jit, value);
9.891 + jit->write_ubyte(jit, IA32_CMP_EAX_IMM32);
9.892 + jit->write_int32(jit, value);
9.893 }
9.894
9.895 -inline void IA32_SetCC_Rm8(jitinfo_t *jit, jit_uint8_t reg, jit_uint8_t cond)
9.896 +inline void IA32_SetCC_Rm8(JitWriter *jit, jit_uint8_t reg, jit_uint8_t cond)
9.897 {
9.898 - jit->wrfuncs.write_ubyte(jit, IA32_SETCC_RM8_1);
9.899 - jit->wrfuncs.write_ubyte(jit, IA32_SETCC_RM8_2+cond);
9.900 - jit->wrfuncs.write_ubyte(jit, ia32_modrm(MOD_REG, 0, reg));
9.901 + jit->write_ubyte(jit, IA32_SETCC_RM8_1);
9.902 + jit->write_ubyte(jit, IA32_SETCC_RM8_2+cond);
9.903 + jit->write_ubyte(jit, ia32_modrm(MOD_REG, 0, reg));
9.904 }
9.905
9.906 -inline void IA32_Rep(jitinfo_t *jit)
9.907 +inline void IA32_Rep(JitWriter *jit)
9.908 {
9.909 - jit->wrfuncs.write_ubyte(jit, IA32_REP);
9.910 + jit->write_ubyte(jit, IA32_REP);
9.911 }
9.912
9.913 -inline void IA32_Movsd(jitinfo_t *jit)
9.914 +inline void IA32_Movsd(JitWriter *jit)
9.915 {
9.916 - jit->wrfuncs.write_ubyte(jit, IA32_MOVSD);
9.917 + jit->write_ubyte(jit, IA32_MOVSD);
9.918 }
9.919
9.920 -inline void IA32_Movsb(jitinfo_t *jit)
9.921 +inline void IA32_Movsb(JitWriter *jit)
9.922 {
9.923 - jit->wrfuncs.write_ubyte(jit, IA32_MOVSB);
9.924 + jit->write_ubyte(jit, IA32_MOVSB);
9.925 }
9.926
9.927 -inline void IA32_Stosd(jitinfo_t *jit)
9.928 +inline void IA32_Stosd(JitWriter *jit)
9.929 {
9.930 - jit->wrfuncs.write_ubyte(jit, IA32_STOSD);
9.931 + jit->write_ubyte(jit, IA32_STOSD);
9.932 }
9.933
9.934 -inline void IA32_Cld(jitinfo_t *jit)
9.935 +inline void IA32_Cld(JitWriter *jit)
9.936 {
9.937 - jit->wrfuncs.write_ubyte(jit, IA32_CLD);
9.938 + jit->write_ubyte(jit, IA32_CLD);
9.939 }
9.940
9.941 #endif //_INCLUDE_JIT_X86_MACROS_H
