1.1 --- a/sourcepawn/vm/jit/x86/opcode_helpers.cpp Thu Sep 21 05:04:51 2006 +0000
1.2 +++ b/sourcepawn/vm/jit/x86/opcode_helpers.cpp Fri Sep 22 11:52:19 2006 +0000
1.3 @@ -247,8 +247,8 @@
1.4 jitoffs_t jmp1 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
1.5 IA32_Cmp_Reg_Rm_Disp8(jit, reg, AMX_REG_INFO, AMX_INFO_HEAP);
1.6 jitoffs_t jmp2 = IA32_Jump_Cond_Imm8(jit, CC_B, 0);
1.7 - IA32_Lea_Reg_DispRegMult(jit, REG_ECX, reg, REG_EDI, NOSCALE);
1.8 - IA32_Cmp_Rm_Reg(jit, REG_ECX, AMX_REG_STK, MOD_REG);
1.9 + IA32_Lea_Reg_DispRegMult(jit, AMX_REG_TMP, reg, AMX_REG_DAT, NOSCALE);
1.10 + IA32_Cmp_Rm_Reg(jit, AMX_REG_TMP, AMX_REG_STK, MOD_REG);
1.11 jitoffs_t jmp3 = IA32_Jump_Cond_Imm8(jit, CC_AE, 0);
1.12 IA32_Send_Jump8_Here(jit, jmp1);
1.13 Write_Error(jit, SP_ERR_MEMACCESS);
1.14 @@ -328,15 +328,15 @@
1.15 //mov ecx, [esi+hea]
1.16 //cmp ecx, [esi+hlw]
1.17 //jl :error_heapmin
1.18 - IA32_Mov_Reg_Rm_Disp8(jit, REG_ECX, AMX_REG_INFO, AMX_INFO_HEAP);
1.19 - IA32_Cmp_Reg_Rm_Disp8(jit, REG_ECX, AMX_REG_INFO, AMX_INFO_HEAPLOW);
1.20 + IA32_Mov_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_HEAP);
1.21 + IA32_Cmp_Reg_Rm_Disp8(jit, AMX_REG_TMP, AMX_REG_INFO, AMX_INFO_HEAPLOW);
1.22 jitoffs_t hm = IA32_Jump_Cond_Imm8(jit, CC_L, 0);
1.23 //lea ecx, [edi+ecx+STACK_MARGIN]
1.24 //cmp ecx, ebp
1.25 // jg :error_heaplow
1.26 //OR
1.27 // ret
1.28 - IA32_Lea_Reg_DispRegMultImm8(jit, REG_ECX, AMX_REG_DAT, REG_ECX, NOSCALE, STACK_MARGIN);
1.29 + IA32_Lea_Reg_DispRegMultImm8(jit, AMX_REG_TMP, AMX_REG_DAT, AMX_REG_TMP, NOSCALE, STACK_MARGIN);
1.30 IA32_Cmp_Rm_Reg(jit, REG_ECX, AMX_REG_STK, MOD_REG);
1.31 jitoffs_t hl = IA32_Jump_Cond_Imm8(jit, CC_G, 0);
1.32 jitoffs_t cont;
1.33 @@ -378,7 +378,6 @@
1.34 IA32_Send_Jump8_Here(jit, jmp);
1.35 }
1.36
1.37 -
1.38 void Macro_PushN_Addr(JitWriter *jit, int i)
1.39 {
1.40 //push eax
1.41 @@ -643,4 +642,3 @@
1.42 OpAdvTable[OP_SYSREQ_ND] = -3;
1.43 OpAdvTable[OP_PUSH_R] = -3;
1.44 }
1.45 -